CA1066782A - Receiver for synchronous signals with double phase-locked loop - Google Patents

Receiver for synchronous signals with double phase-locked loop

Info

Publication number
CA1066782A
CA1066782A CA266,007A CA266007A CA1066782A CA 1066782 A CA1066782 A CA 1066782A CA 266007 A CA266007 A CA 266007A CA 1066782 A CA1066782 A CA 1066782A
Authority
CA
Canada
Prior art keywords
phase
circuit
output
frequency
receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA266,007A
Other languages
English (en)
French (fr)
Inventor
Frank De Jager
Peter Van Der Wurf
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of CA1066782A publication Critical patent/CA1066782A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/144—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements
    • H04L27/152—Demodulator circuits; Receiver circuits with demodulation using spectral properties of the received signal, e.g. by using frequency selective- or frequency sensitive elements using controlled oscillators, e.g. PLL arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
CA266,007A 1975-11-21 1976-11-18 Receiver for synchronous signals with double phase-locked loop Expired CA1066782A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7513610A NL7513610A (nl) 1975-11-21 1975-11-21 Ontvanger voor synchrone signalen met dubbele fasevergrendelde lus.

Publications (1)

Publication Number Publication Date
CA1066782A true CA1066782A (en) 1979-11-20

Family

ID=19824895

Family Applications (1)

Application Number Title Priority Date Filing Date
CA266,007A Expired CA1066782A (en) 1975-11-21 1976-11-18 Receiver for synchronous signals with double phase-locked loop

Country Status (8)

Country Link
JP (1) JPS5264260A (sv)
AU (1) AU507254B2 (sv)
CA (1) CA1066782A (sv)
DE (1) DE2651043C3 (sv)
FR (1) FR2332660A1 (sv)
GB (1) GB1507638A (sv)
NL (1) NL7513610A (sv)
SE (1) SE410693B (sv)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2823343B1 (de) * 1978-05-29 1979-08-16 Siemens Ag Verfahren und Anordnung zur Taktsignalrueckgewinnung bei digitaler Signaluebertragung
FR2441298A1 (fr) * 1978-11-07 1980-06-06 Cit Alcatel Dispositif de recuperation de rythme
JPS55165648A (en) * 1979-06-12 1980-12-24 Nec Corp Method of sorting and inspecting semiconductor device
ZA805414B (en) * 1979-09-14 1981-08-26 Plessey Overseas Arrangements for data timing recovery from distorted signals for use in adaptive modems with multi-level coding
JP2804755B2 (ja) * 1986-09-01 1998-09-30 株式会社日立製作所 Ｆｓｋ信号復調回路
CN107037487B (zh) * 2016-02-04 2023-06-20 中国石油化工集团有限公司 一种井间电磁同步测量系统

Also Published As

Publication number Publication date
AU1976376A (en) 1978-05-25
DE2651043C3 (de) 1981-07-30
AU507254B2 (en) 1980-02-07
FR2332660A1 (fr) 1977-06-17
SE410693B (sv) 1979-10-22
JPS5264260A (en) 1977-05-27
DE2651043A1 (de) 1977-05-26
SE7612875L (sv) 1977-05-22
DE2651043B2 (de) 1980-09-11
NL7513610A (nl) 1977-05-24
GB1507638A (en) 1978-04-19

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