CA1056058A - Semiconductor image sensor having ccd shift register - Google Patents
Semiconductor image sensor having ccd shift registerInfo
- Publication number
- CA1056058A CA1056058A CA242,395A CA242395A CA1056058A CA 1056058 A CA1056058 A CA 1056058A CA 242395 A CA242395 A CA 242395A CA 1056058 A CA1056058 A CA 1056058A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 30
- 238000012546 transfer Methods 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims description 87
- 239000002800 charge carrier Substances 0.000 claims description 24
- 238000005036 potential barrier Methods 0.000 claims description 12
- 229940000425 combination drug Drugs 0.000 claims 1
- 239000000969 carrier Substances 0.000 abstract description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 8
- 230000000875 corresponding effect Effects 0.000 description 6
- 239000012634 fragment Substances 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 235000012239 silicon dioxide Nutrition 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 239000011810 insulating material Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910052729 chemical element Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- FOXFZRUHNHCZPX-UHFFFAOYSA-N metribuzin Chemical compound CSC1=NN=C(C(C)(C)C)C(=O)N1N FOXFZRUHNHCZPX-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920000136 polysorbate Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/148—Charge coupled imagers
- H01L27/14831—Area CCD imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42396—Gate electrodes for field effect devices for charge coupled devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Ceramic Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Abstract
ABSTRACT OF THE DISCLOSURE
A semiconductor image sensor as a sensing structure divided into vertical columns and horizontal rows of elemental sections. Each element includes a photo-sensor and a portion to receive charge overflow. The photo-sensors and portions to receive overflow are covered by a transparent electrode.
Each elemental section in each vertical column is connected to a vertical shift register by a separate charge transfer section covered by a shift electrode structure to which two-phase clock pulses are applied. One end of all of the verti-cal shift registers is connected to a three-phase horizontal shift register. When the potential of a given photo-sensor is higher than that of the transfer section connected to it, light-generated carriers in the photo-sensor are transferred to the vertical shift register to which that transfer section is connected.
A semiconductor image sensor as a sensing structure divided into vertical columns and horizontal rows of elemental sections. Each element includes a photo-sensor and a portion to receive charge overflow. The photo-sensors and portions to receive overflow are covered by a transparent electrode.
Each elemental section in each vertical column is connected to a vertical shift register by a separate charge transfer section covered by a shift electrode structure to which two-phase clock pulses are applied. One end of all of the verti-cal shift registers is connected to a three-phase horizontal shift register. When the potential of a given photo-sensor is higher than that of the transfer section connected to it, light-generated carriers in the photo-sensor are transferred to the vertical shift register to which that transfer section is connected.
Description
-- S073~
- 105~058 BACKGROUND OF THE INVE~TION
FieLd of the Invention This invention relates to semiconductor image sensors having charge-coup~ed devices (CCD) operating as electro-optic transducers and charge-transfer devices and as a self-scanning matrix structure.
The Prior Art There are existing image sensors constructed on the sur-face of a semiconductor divided into elements arranged in hori-zontal rows and vertical columns. Each element includes a qemiconductive photo-sensor and a charge-transfer device con-nected thereto to connect all of the photo-sensor elements of a vertical column to a vertical shift register. One end of each of the vertical shift registers is connected to the hori-zontal shift register located on the same semico~nductor sub-strate.
The vertical shift registers are operated in unison to transfer charge carriers from position to position along the vertical shift registers 90 that they eventually reach the hor~zontal shift register. The carriers reach the horizontal shift register at the equivalent of one horizontal line of the video image at a time, and they are transferred along the hori-zontal shift register at a rate equivalent to the horizontal I scanning speed of a television system. At the output of the I horizontal shift re$ister, the carriers are applied to a utili-~ zation circuit.
;i The conventional elements of an image sensor according to the prior art include an insulating layer on the semiconductor
- 105~058 BACKGROUND OF THE INVE~TION
FieLd of the Invention This invention relates to semiconductor image sensors having charge-coup~ed devices (CCD) operating as electro-optic transducers and charge-transfer devices and as a self-scanning matrix structure.
The Prior Art There are existing image sensors constructed on the sur-face of a semiconductor divided into elements arranged in hori-zontal rows and vertical columns. Each element includes a qemiconductive photo-sensor and a charge-transfer device con-nected thereto to connect all of the photo-sensor elements of a vertical column to a vertical shift register. One end of each of the vertical shift registers is connected to the hori-zontal shift register located on the same semico~nductor sub-strate.
The vertical shift registers are operated in unison to transfer charge carriers from position to position along the vertical shift registers 90 that they eventually reach the hor~zontal shift register. The carriers reach the horizontal shift register at the equivalent of one horizontal line of the video image at a time, and they are transferred along the hori-zontal shift register at a rate equivalent to the horizontal I scanning speed of a television system. At the output of the I horizontal shift re$ister, the carriers are applied to a utili-~ zation circuit.
;i The conventional elements of an image sensor according to the prior art include an insulating layer on the semiconductor
2--lVS~i058 subctrate and a transparent electrode on the insulating layer.
One part of each element is arranged so that the transparent electrode is spac2d from the substrate onLy by the insulating layer so that photons that reach the transparent electrode can produce minority charge carriers in the region of the sub-strate directly behind that part of the transparent electrode.
The elemental area also includes one electrode of the vertical shift register to which that element is connected. Part of the electrode is separated from the semiconductor substrate by the insulating layer, and between that part and the part of the transparent electrode that is also separated from the substrate only by the insulating layer is a tranfer electrode.
The transfer electrode is also separated from the semiconductor substrate by the insulating layer, and a part of the shift register electrode overlaps the transfer electrade but is in-sulated therefrom by additional insulating material. The transparent electrode also extends over the transfer electrode and the shift register electrode but is separated from each of them by more of the insulating material of the insulating layer. An opaque layer overlies the transfer electrode and the shift register electrode, leaving substantially only the area to be illuminated uncoated.
The vertical shift registers of the prior art are operated as two-phase devices, which are clocked at the horizontal repe-tition rate. The transparent electrode has a fixed voltage applied to it and the transfer electrode is pulsed at field repetition rate so that during one field interval, charge car-riers from those elements lying in odd horizontal lines will ~ -,
One part of each element is arranged so that the transparent electrode is spac2d from the substrate onLy by the insulating layer so that photons that reach the transparent electrode can produce minority charge carriers in the region of the sub-strate directly behind that part of the transparent electrode.
The elemental area also includes one electrode of the vertical shift register to which that element is connected. Part of the electrode is separated from the semiconductor substrate by the insulating layer, and between that part and the part of the transparent electrode that is also separated from the substrate only by the insulating layer is a tranfer electrode.
The transfer electrode is also separated from the semiconductor substrate by the insulating layer, and a part of the shift register electrode overlaps the transfer electrade but is in-sulated therefrom by additional insulating material. The transparent electrode also extends over the transfer electrode and the shift register electrode but is separated from each of them by more of the insulating material of the insulating layer. An opaque layer overlies the transfer electrode and the shift register electrode, leaving substantially only the area to be illuminated uncoated.
The vertical shift registers of the prior art are operated as two-phase devices, which are clocked at the horizontal repe-tition rate. The transparent electrode has a fixed voltage applied to it and the transfer electrode is pulsed at field repetition rate so that during one field interval, charge car-riers from those elements lying in odd horizontal lines will ~ -,
-3-~ ~5 ~V ~8 be transferred to their respective vertical shift registers, and during the remaining alternate field intervals, those elements lying in even horizontal lines will transfer their :~
carriers to their respective vertical shift registers.
The prior art structure requires three types of electrodes, one to receive the proper potential to oPerate the photc-sensors, another to receive the clock pulses, and a third to ~r~nsfer charge carriers from the photo-sensor regions to regi~ns controlled by the electrodes operated by the clock pulses.
SUMMARY OF THE INVENTION
The present invention is a semiconductor image sensor with sensor elements arranged in vertical columns and hori-zontal rows and being capable of generally the same type of operation as the prior art structures but without the necessity of providing transfer electrodes and the voltage heretofore required for such electrodes.
Further in accordance with the present invention, carriers are transferred by an overflow operation to improve resolution of the image sensor.
According to one aspect of this invention a transfer gate-le~s photo-sensor element for a semiconductor image sensor, said photo-sensor element comprises: a substrate of one con-ductivity type; an insulating layer on said substrate; a first ... .
.` electrode on said insulating layer having first means for apply-ing a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said sub-- ~trate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode 30 by said first means, a first region in said substrate which is ... ,.; .
a potential well for minority charge carriers in said substrates ', a second electrode in said insulating layer having second me~ns :
, ~ - 4 -~5~5~
for appl~ing a potential to said second electrode, said second electrode having a second electrode portion adjacent one side o~ said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode portion being spaced from said substrate by a thickness of s~id insulat- -ing layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said sub-strate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a poten-tial barrier for said minority charge carriers in said sub-strate relative to said potential well in said first region, and for defining with said third electrode portion in combin~ -tion with the potential applied to said second electrode by said second means a third region in said substrate adjacent said second region and which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in ~aid second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insulated from the latter by said insulating layer, ~aid third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion over-r"
i lapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than said thickness of the insulating layer which spaces aaid third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion co-operating with an ad~acent portion of the other of ~aid second .- 30 and third electrodes to define an opening above said first region.
,~ .
~ . .
10~ 8 According to another asDect of this invention a semi-condu~or image sensor is composed of a plurality of charge-- coup~-~ transfer gate-less photo-sensor elements each as recited above and with said first electrode further including a con-necting portion extending from said side of said first elec-tro~e to which said second electrode portion of said second electrode is adjacent over said second electrode for connection to a first electrode portion of a first electrode of another of said photo-sensor elements, said insulating layer spacing said connecting portion of said first electrode from said second electrode. .
According to a further aspect of this invention a semiconductor image sensor is composed of a plurality of charge-coupled transfer gate-less photo-sensor elements each as recited , . above and with said first electrode further including a fifth ; electrode portion along a side thereof which is different from said side of said first electrode adjacent to said second elec-trode and which is spaced from said substrate by a thickness of said insulating layer greater than the thickness of said insulating layer which spaces said first electrode portion of said first electrode from said substrate for defining, in com-. bination with the potential applied to said first electrode by ~aid first means, a fourth region which i8 a potential barrier for said minority charge carriers relative to said potential ~ well in said first reg~on of said substrate, said potential;1, barrier in said fourth region being lower than said potential ;.
barrier in said second region of said substrate to control the number of said minority charge carriers which can be stored in said potential well in 8aid first region of said substrate.
BRiEF DæSCXIPTION OF THE DRAWINGS
Fig. 1 is a schematic representation of a conventional .
semiconductor image 80n80r employing an interline transfer , .
.
~ 4b -:. X
. ~, .
~5~058 operation.
Fig. 2 is a cross-sectional view along the line 2-2 of a fragment of the sensor in Fig. 1.
Fig. 3 is a plan view of a fragment of a semiconductor image sensor according to the present invention.
Figs. 4-6 are cross-sectional views of a fragment of the ~ .
` - 4c - ;
.. ..
.'~ ~ ,.
~ 5i8 device in Fig. 3 alsng the lines 4-4, 5-5, and 6-6, respective-ly, in Fig. 3.
FigC 7A-7G are crocs-sectional views of a semiconductor structure illuctrating a sUccecsion of steps in the production of the device shown in Figs. 3-6.
Figs. 8A-~C are waveforms of voltage pulses applied to operate the device in Figs. 3-6.
Fig. 9 is a plan view of another fragment of a semicon-ductor image sen~or according to the invention.
Fig. 10 is a cross-sectional view of a fragment of the tevice in Fig. 9 along the line 10-10.
DESCRIPTIO~ OF THE PREFERRED EMBODIME~TS
The semiconductor images sensor in Fig. L is constructed on the major surface of a semiconductor substrate (not shown) and incLudes a matrix of photo-sensor elements l arranged in vertical columns and horizontal rows. All of the photo-sencor eLements 1 in a given vertical column are connected to the same : vertical shift register 2, and one end of each of the vertical shift registers 2 is connected to a horizontal shift register 3, which is also located on the semiconductor substrate. Minor-ity carriers generated in each of the photo-sensor elements l in alternate rows are simultaneously transferred to the vertical shift registers 2. The charges thus transferred are transported sequentially along the vertical shift registers 2 to the hori-zontal shift regicter 3 and are transferred from left to right along the shift register 3 to an output terminal connected to a utilization circuit. Then the minority carriers in the re-maining alternate horizontal rows, which represent horizortal ` `
. . . . . . ... . . .
lUS~V58 scanning lines of an interiac2d scanning system, are trans-ferred to the vertical Chift registers 2 and along the verti-cal shif~ registers to the horizontal shift regicter 3. The rate of transfer of charge carriers along the shift register 3 correspondc to the scanning rate of a single horizontal line in a television syctem, and the rate of transfer of carriers along the vertical shift registers 2 corresponds to the verti-cal scanning speed of a television system.
Fig 2 is a cross-sectional view of one of the elemen~s of the device in Fig. 1. The photo-sensor l is constructed on a major surface of a semiconductor substrate 10, which, in this embodiment, is an N-type substrate. An insulating layer 11 is formed on one surface of the substrate and in the region .
of the photo-sensor 1, a transparent electrode 12 is formed directly on the surface of the insulating layer 11 The verti-cal shift register 2 to which this particular photo-sensor element 1 is connec~ed includes a shifting electrode.l3, which is fonmed on another part of the insulating layer 11. Still another electrode L4, referred to as the transfer electrode, is formed on the layer 11 bet~een the photo-sensor 1 and part of the shifting electrode 13. Another part of the shifting electrode 13 overlaps the transfer electrode 14 and is insu-; lated therefrom by the same insulating material that makes up the layer 11. The transparent electrode 12 also overlaps the transfer electrode 14 and the shifting electrode 13, as w211, but is insul~ted from both of them by more of the insulatinO
~` material of the type in the layer 11. The portion of the struc-ture shown in Fig. 2 that includes the transfer electrode 14 .~ .
` -6-1~5 ~ 5 ~
is identified as the transfer portion 15. Vertical edges of the columns are defined by c'nannel stops 16 of ~7~ type con-ductivity and by an opa~ue light shield layer 17.
The operation of the element n Fig. 2 and of the sensor in Fig. l includes the application of a suitable fixed voltage Vs to the transparent electrode 12. This voltage Vs may be, for example, about -20 volts Each of the vertical shift regis-ters 2 in Fig. 1 includes a separate electrode 13 of the type shown in Fig. 2 for each of the elements 1. Alternate shifting electrodes 13 in the various vertical shift registers 2 have clock pulses ~ 1 at, for example, 0 volts appLied to them, and the remaining alternate shift electrodes 13 have clock pulses ~ 2 at, for example, -20 volts applied to them. At the end of each horizontal line interval the pulses shift, and those electrodes to which the 0 volts was applied receive the -20 volts, and vice versa. A voltage Vt of, for example, -20 volts is applied to the transfer electrodes 14 for a fixed interval that corresponds to one field interval.
When light is incident on the photo-sensors 1 in Fig. 1, a pattern of charges is produced In the single element in Fig. 2, the incident light on the exposed part of the trans-psrent electrode 12 having a suitable voltage Vs applied to it cause9 minority carriers (holes~ to be generated and to be stored at the immediately adjacent part of the semiconductor substrate 10 in a region thereof defined as having a potential well (with respect to holes). When the minority carriers are accumulated, the potential of the well rises according to charges on the holes stored in that well. As long as the transfer :
lOS-SOS8 electrode hac a voltage Vt = O applied to it, the potential of the transferring portion 15 is high, and stored carriers in the photo-sensor 1 are not transferred to the shift egis-ter 2. On the other hand when the voltage Vt = -20 volts is applied to the trancfer electrode 14, the potential of that portion of the semiconductor substrate 10 under the electrode 14 is lowered according to the dotted line 21, and minority carriers in the photo-sensor 1 are transferred to the shift register 2.
The vertical shift registers 2 in Fig. 1 operate ~ccord-ing to a two-phase principle so that alternate electrodes 13 must not have charge carriers transferred to them by their re-spective photo-sensors 1. This permits the charges that are transferred to the remaining alternate electrodes 13 from their respective photo elements 1 to be transerred along the verti-cal shift registers 2 to the shift register 3. After trans-ferring the charge carriers, the voltage Vt on the transfer electrodes 14 returns to Vt = O, and the carriers that have been transferred to the vertical shift registers 2 can be trans-ferred along these shift registers to the horizontal shift register 3.
One of the disadvantages of the electrode configuration in Fig. 2 is that three kinds of electrodes are required. In addition, the voltage of the transfer electrode 14 is influenced by the voltage of the shifting electrode 13 if the transfer electrode 14 is made of high resistivity poly-silicon.
The embodiment of the invention in Figs. 3-6 will now be described. The semiconductor image sencor according to lOS~1058 this invention has photo-C~ncor elements arranged in a matrix 22 with a plurality of vertical CCD shift regicters 23 separating the eleme-nts 22 into vertical columns A transfer portion 24 is located between each of the elements 22 and its vertical shift register 23, and overfLowing portions 25 defined by po-tential barriers in the substrate 21 also extend vertically aLong the elements Z2 to separate the columns of photo-sensor elements 22 and adjacent shift register elements 23. This em-bodiment of the invention also includes a horizontal CCD shift register (not shown) at the corresponding end of each of the vertical shift registers 23.
Each photo-sensor 22 includes a portion of a transparent electrode 26 applied to the exposed surface of an insulating layer 27 on the surface of the semiconductor substrate 21.
Shifting electrodes 28a and 28b are also applie~ to the insulating -layer 27 but are separated from different portions of the sur-face of the substrate 21 by different thi^knesses of the layer 27 to constitute vertical transfer devices 29. Clock pulses 01 and 02 are apPlied to alternate sets of shift-ing electrodes 28a and 28b. As shown particularly in Fig. 5, the shifting electrodes 28a are applied over thin portions of the insulating ~yer 27. As shown particularly in Fig. 6, the shifting electrodec 28b are applied over thicker portions of the insulating layer 27. Each of the shifting electrodes 28a and 28b has an edge portion with a greater thickness of the layer 27 between it and the substrate 21 than the central por-tion of that shi~ting electrode. As shown in Fig. 4, the application of clock pulsec voltages of Yl = -15V and !~2-, .
_ 9 _ .
adjacent Ce~fi~6lo 5 8= OV to / electrodes 28a and 28b forms a stairli~e potential well 30 within t~ subctrate 21, The tran~ferring portion 24 incl~des an extended portion of the first shifting electrod2 28a separated from the sub-strate 21 by a relativeiy thick portion of the insulating layer 27 located between the photo-sencor 22 and the shift register 23 for that photo-sencor. As shown in Fig, 5, the potential 33a of the transfer portion 24 is higher than the potential 33b due to the shift regicter electrode 28a, In this embodi-ment, the thickness tl of the insulating layer 27 under the transfer portion 24 of the electrode 28a is larger than the thickness t2 of that portion of the layer 27 under the central part of the electrode 28a. The edge of this shifting electrdde 28a away from transfer portion 24 also has a relatively thick portion of the insulating layer 27 between it and the su'~;trate 2l to form a channel stopping region 30 in which the potential i8 relatively high to prevent the leakage of carriers from one vertical column to the next. A P+ region 31 extending vertically adjacent the region 30 also helps to isolate the vertical columns.
A voltage V9l is applied to the transparent electrode 26 to ~orm a deep potential well 33c, as shown in Fig, 5, when carriers are to be stored. A voltage Vs2 is applied to produce a shallow potential 33c~ which is higher than the potential 33b of the shift register 23, when the shifting electrode 28 has the lower (negative) level of the clock pulse applied to it. As a result, carriers stored in the photo-sensor 22 are transferred to the shift register 23, The potential 33c' of this part of the cemiconductor substrate 21 is lower than the ,' :
5~ 5 8 potential 33b' of the shlLt register 23 when the higher level of the clock pulse is ap?Lied to the elec,rode 28a of the shift register, The potential 33c in the potential well under the exposed part of the trans?arent electrode 26 ic, of course, raised to some extent acco.ding to the quantity of stored charges 35.
The overflow portion 2~ includes the opposite conductivity region 31 that extends vertically along the elements 22 on the substrate 21 and also includes a portion of the transparent electrode 26 on a thick section of the insulating layer 27 be-tween the photo-sensor 22 and the region 31. The overflow por-tion 32 has a potential 33d that is higher than the potential 33c of the photo-sensor 22 when the voltage Vsl is applied to the transparent electrode 26, The potential 33d is lower than the potential 33a of the tranferring portion 24 ~hen either the higher or the lower (more negative) level of the clock pulse is applied to the electrode 28a, Thus, when strong light i9 incident on the photo-censor ~2 so as to cause excessive voltage build-up due to the storage of an excessive number of carriers 35, the extra carriers 35a overflow to the region 31, to which a reverse bias i9 applied. Otherwise the surplus carriers, if they raised the potential 33c above the level of the ~arrier 33a, would flow into the shift register 23. The difference between the ~arriers 33a and 33d is indicated by a vertical measurement d, If surplus carriers flowed into ~;
the shift register 23, they would reduce the resolution of the image sensor.
In the embodiment ~ho-~ in Figs. 3-6, the thic~ness t3 ;
lOS~058 of the insulating layer 27 in the overflow portion 32 is greater than the thic~ness t4 in the portion of the photo-sensor 22 that operat2C in ctoring minority carriers. If the thickness tl is equal to the thickness t3 and if the thickness t2 is equal to the thickness t4, the voltage applied to the transparent electrode 26 is more negative than the lower (negative) leveL of the cLock pulse (~ lSVolts) applied to the shifting electrode 28 .
The transparent electrode 26 covers all of the insulating layer 27, but a light shield and conductive layer 34 covers most of the layer 26 except ~or the portion devoted to the photo-sensor 22.
Fig. 7 illustrates the method of manufacturing an image sen90r of the type just described in connection with Figs. 3-6.
A silicon dioxide layer 27a having a thickness ~f about .4 microns i9 formed on a major surface of the N type silicon substrate 21. The layer 27a is selectively etched, and P+ type regions 31 are diffused through the resulting windows 36 (Fig. 7A).
Thereafter the layer 27a is again selectively etched to form a silicon dioxide layer 27b having a thickness of .1 micron (Fig. 7~).
A first electrode 28a of doped poly-silicon is deposited on the portion 27b of the layer 27a and adjacent portions of the layer 27a. The electrode 28a also overLaps the adjacent channel stopping region 31 (Fig. 7C).
An additional silicon dioxide layer 27c having a thic~-:`~
: ness of about .3 micron ic formed over the entire exposed ~, surface (Fig. 7D). A cecond electrode 28b OL doped poly-silicon -;, .
` -12-1~35~058 (shown in Fig. 6) is ~electLvely deposited on the layer 27c to be vertically in line t~ith the electrode 28a.
- The layers 27a and 27c are selectively etched to form a thin silicon dioxide layer 27d having a thicknesc of about .1 micron in a region that will later become the photo-sensor 22 (Fig. 7E).
A transparent layer 26 of tin oxide or thin, doped poly-silicon is deposited over the entire exposed surface of the device (Fig. 7F).
A light shield layer 34 of aluminum is deposited on por-tions of the layer 26 except those that are to be used as the photo-sensor 22 (Fig. 7G).
The voltage pulses used in the operation of the device in Figs. 3-6 are shown in Figs. 8A-8C. Fig. 8A represents the voltage Vs applied to the transparent electrode 26. This voltage has a value of -20 volts corresponding to Vsl during the interval Tl corresponding to the visible part of a tele-vision field. The voltag2 Vs has a value of -10 volts corres-ponding to V92 during an interval of T2 that corresponds to the vertical blanking interval. Figs. 8B and 8C show clock pulses 01 and 02~ which are square wave pulses having a duty cycle twice t~e horiæontal line scanning interval of the tele-vision system with the polarity of 02 opposite to that of 01 Both of the pulses 01 and 02 have a positive value of Ovolts and a negative value of -15 volts, and they are applied to alternate shifting electrodes of the vertical shift register to be operated as a two-phase CCD
When the voltage Vsl of Fig. 8A is applied to the trans-1~5~0~8 parent el~ctrode 26, minor-ty carriers are generated in the photo-sensors 22 according to the strength of the ligh~ in-cident thereon and are stored at the potential well 33c, which is shown particularly in Fig. 5. When the voltage Vs2 is ap-plied and a cLock pulse vaLue of -15 volts is also applied to the shifting electrode 28a, the potential 33c' of the photo-sensor is made higher than the potential 33a of the transferring portion 24, and carrierC are transferred to the shift register 23. On the other hand, if the 0 volt value of the clock pulse is applied to the shift register 23,the potential 33cr of the photo-sensor 22 is lower than the potential 33a~ of the trans-fer portion 24, so that carriers are not transferred. Since the clock pulses 01 and 02 are applied in opposite polarity to adjacent sets of electrodec 28a and 28b? carriers are trans-ferred from alternate photo-sensors 22 to their respective shift registers 23, and carriers are transferred at 2Tl inter-vals in each cell.
Carriers simultaneously transferred from each photo-sensor 22 to the corresponding vertical shift register 23 are sequent-; ially transferred vertically by the cloc~ pulses 01 and 02.
Carriers from, for exampLe, odd numbered fields are thus in-serted into the horizontal CCD shift register at one line in-. tervals and are transferred to an output circuit during each line interval. After trans~2rring the carriers, which is equivalent to scanning the i~age optically produced on the semiconductor image sensor, in one field interval, the voltage Vs2 is applied to the trancparc~nt electrode 26, and carrierC
that correspond to even numbered fields are simultaneously ` . ''
carriers to their respective vertical shift registers.
The prior art structure requires three types of electrodes, one to receive the proper potential to oPerate the photc-sensors, another to receive the clock pulses, and a third to ~r~nsfer charge carriers from the photo-sensor regions to regi~ns controlled by the electrodes operated by the clock pulses.
SUMMARY OF THE INVENTION
The present invention is a semiconductor image sensor with sensor elements arranged in vertical columns and hori-zontal rows and being capable of generally the same type of operation as the prior art structures but without the necessity of providing transfer electrodes and the voltage heretofore required for such electrodes.
Further in accordance with the present invention, carriers are transferred by an overflow operation to improve resolution of the image sensor.
According to one aspect of this invention a transfer gate-le~s photo-sensor element for a semiconductor image sensor, said photo-sensor element comprises: a substrate of one con-ductivity type; an insulating layer on said substrate; a first ... .
.` electrode on said insulating layer having first means for apply-ing a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said sub-- ~trate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode 30 by said first means, a first region in said substrate which is ... ,.; .
a potential well for minority charge carriers in said substrates ', a second electrode in said insulating layer having second me~ns :
, ~ - 4 -~5~5~
for appl~ing a potential to said second electrode, said second electrode having a second electrode portion adjacent one side o~ said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode portion being spaced from said substrate by a thickness of s~id insulat- -ing layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said sub-strate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a poten-tial barrier for said minority charge carriers in said sub-strate relative to said potential well in said first region, and for defining with said third electrode portion in combin~ -tion with the potential applied to said second electrode by said second means a third region in said substrate adjacent said second region and which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in ~aid second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insulated from the latter by said insulating layer, ~aid third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion over-r"
i lapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than said thickness of the insulating layer which spaces aaid third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion co-operating with an ad~acent portion of the other of ~aid second .- 30 and third electrodes to define an opening above said first region.
,~ .
~ . .
10~ 8 According to another asDect of this invention a semi-condu~or image sensor is composed of a plurality of charge-- coup~-~ transfer gate-less photo-sensor elements each as recited above and with said first electrode further including a con-necting portion extending from said side of said first elec-tro~e to which said second electrode portion of said second electrode is adjacent over said second electrode for connection to a first electrode portion of a first electrode of another of said photo-sensor elements, said insulating layer spacing said connecting portion of said first electrode from said second electrode. .
According to a further aspect of this invention a semiconductor image sensor is composed of a plurality of charge-coupled transfer gate-less photo-sensor elements each as recited , . above and with said first electrode further including a fifth ; electrode portion along a side thereof which is different from said side of said first electrode adjacent to said second elec-trode and which is spaced from said substrate by a thickness of said insulating layer greater than the thickness of said insulating layer which spaces said first electrode portion of said first electrode from said substrate for defining, in com-. bination with the potential applied to said first electrode by ~aid first means, a fourth region which i8 a potential barrier for said minority charge carriers relative to said potential ~ well in said first reg~on of said substrate, said potential;1, barrier in said fourth region being lower than said potential ;.
barrier in said second region of said substrate to control the number of said minority charge carriers which can be stored in said potential well in 8aid first region of said substrate.
BRiEF DæSCXIPTION OF THE DRAWINGS
Fig. 1 is a schematic representation of a conventional .
semiconductor image 80n80r employing an interline transfer , .
.
~ 4b -:. X
. ~, .
~5~058 operation.
Fig. 2 is a cross-sectional view along the line 2-2 of a fragment of the sensor in Fig. 1.
Fig. 3 is a plan view of a fragment of a semiconductor image sensor according to the present invention.
Figs. 4-6 are cross-sectional views of a fragment of the ~ .
` - 4c - ;
.. ..
.'~ ~ ,.
~ 5i8 device in Fig. 3 alsng the lines 4-4, 5-5, and 6-6, respective-ly, in Fig. 3.
FigC 7A-7G are crocs-sectional views of a semiconductor structure illuctrating a sUccecsion of steps in the production of the device shown in Figs. 3-6.
Figs. 8A-~C are waveforms of voltage pulses applied to operate the device in Figs. 3-6.
Fig. 9 is a plan view of another fragment of a semicon-ductor image sen~or according to the invention.
Fig. 10 is a cross-sectional view of a fragment of the tevice in Fig. 9 along the line 10-10.
DESCRIPTIO~ OF THE PREFERRED EMBODIME~TS
The semiconductor images sensor in Fig. L is constructed on the major surface of a semiconductor substrate (not shown) and incLudes a matrix of photo-sensor elements l arranged in vertical columns and horizontal rows. All of the photo-sencor eLements 1 in a given vertical column are connected to the same : vertical shift register 2, and one end of each of the vertical shift registers 2 is connected to a horizontal shift register 3, which is also located on the semiconductor substrate. Minor-ity carriers generated in each of the photo-sensor elements l in alternate rows are simultaneously transferred to the vertical shift registers 2. The charges thus transferred are transported sequentially along the vertical shift registers 2 to the hori-zontal shift regicter 3 and are transferred from left to right along the shift register 3 to an output terminal connected to a utilization circuit. Then the minority carriers in the re-maining alternate horizontal rows, which represent horizortal ` `
. . . . . . ... . . .
lUS~V58 scanning lines of an interiac2d scanning system, are trans-ferred to the vertical Chift registers 2 and along the verti-cal shif~ registers to the horizontal shift regicter 3. The rate of transfer of charge carriers along the shift register 3 correspondc to the scanning rate of a single horizontal line in a television syctem, and the rate of transfer of carriers along the vertical shift registers 2 corresponds to the verti-cal scanning speed of a television system.
Fig 2 is a cross-sectional view of one of the elemen~s of the device in Fig. 1. The photo-sensor l is constructed on a major surface of a semiconductor substrate 10, which, in this embodiment, is an N-type substrate. An insulating layer 11 is formed on one surface of the substrate and in the region .
of the photo-sensor 1, a transparent electrode 12 is formed directly on the surface of the insulating layer 11 The verti-cal shift register 2 to which this particular photo-sensor element 1 is connec~ed includes a shifting electrode.l3, which is fonmed on another part of the insulating layer 11. Still another electrode L4, referred to as the transfer electrode, is formed on the layer 11 bet~een the photo-sensor 1 and part of the shifting electrode 13. Another part of the shifting electrode 13 overlaps the transfer electrode 14 and is insu-; lated therefrom by the same insulating material that makes up the layer 11. The transparent electrode 12 also overlaps the transfer electrode 14 and the shifting electrode 13, as w211, but is insul~ted from both of them by more of the insulatinO
~` material of the type in the layer 11. The portion of the struc-ture shown in Fig. 2 that includes the transfer electrode 14 .~ .
` -6-1~5 ~ 5 ~
is identified as the transfer portion 15. Vertical edges of the columns are defined by c'nannel stops 16 of ~7~ type con-ductivity and by an opa~ue light shield layer 17.
The operation of the element n Fig. 2 and of the sensor in Fig. l includes the application of a suitable fixed voltage Vs to the transparent electrode 12. This voltage Vs may be, for example, about -20 volts Each of the vertical shift regis-ters 2 in Fig. 1 includes a separate electrode 13 of the type shown in Fig. 2 for each of the elements 1. Alternate shifting electrodes 13 in the various vertical shift registers 2 have clock pulses ~ 1 at, for example, 0 volts appLied to them, and the remaining alternate shift electrodes 13 have clock pulses ~ 2 at, for example, -20 volts applied to them. At the end of each horizontal line interval the pulses shift, and those electrodes to which the 0 volts was applied receive the -20 volts, and vice versa. A voltage Vt of, for example, -20 volts is applied to the transfer electrodes 14 for a fixed interval that corresponds to one field interval.
When light is incident on the photo-sensors 1 in Fig. 1, a pattern of charges is produced In the single element in Fig. 2, the incident light on the exposed part of the trans-psrent electrode 12 having a suitable voltage Vs applied to it cause9 minority carriers (holes~ to be generated and to be stored at the immediately adjacent part of the semiconductor substrate 10 in a region thereof defined as having a potential well (with respect to holes). When the minority carriers are accumulated, the potential of the well rises according to charges on the holes stored in that well. As long as the transfer :
lOS-SOS8 electrode hac a voltage Vt = O applied to it, the potential of the transferring portion 15 is high, and stored carriers in the photo-sensor 1 are not transferred to the shift egis-ter 2. On the other hand when the voltage Vt = -20 volts is applied to the trancfer electrode 14, the potential of that portion of the semiconductor substrate 10 under the electrode 14 is lowered according to the dotted line 21, and minority carriers in the photo-sensor 1 are transferred to the shift register 2.
The vertical shift registers 2 in Fig. 1 operate ~ccord-ing to a two-phase principle so that alternate electrodes 13 must not have charge carriers transferred to them by their re-spective photo-sensors 1. This permits the charges that are transferred to the remaining alternate electrodes 13 from their respective photo elements 1 to be transerred along the verti-cal shift registers 2 to the shift register 3. After trans-ferring the charge carriers, the voltage Vt on the transfer electrodes 14 returns to Vt = O, and the carriers that have been transferred to the vertical shift registers 2 can be trans-ferred along these shift registers to the horizontal shift register 3.
One of the disadvantages of the electrode configuration in Fig. 2 is that three kinds of electrodes are required. In addition, the voltage of the transfer electrode 14 is influenced by the voltage of the shifting electrode 13 if the transfer electrode 14 is made of high resistivity poly-silicon.
The embodiment of the invention in Figs. 3-6 will now be described. The semiconductor image sencor according to lOS~1058 this invention has photo-C~ncor elements arranged in a matrix 22 with a plurality of vertical CCD shift regicters 23 separating the eleme-nts 22 into vertical columns A transfer portion 24 is located between each of the elements 22 and its vertical shift register 23, and overfLowing portions 25 defined by po-tential barriers in the substrate 21 also extend vertically aLong the elements Z2 to separate the columns of photo-sensor elements 22 and adjacent shift register elements 23. This em-bodiment of the invention also includes a horizontal CCD shift register (not shown) at the corresponding end of each of the vertical shift registers 23.
Each photo-sensor 22 includes a portion of a transparent electrode 26 applied to the exposed surface of an insulating layer 27 on the surface of the semiconductor substrate 21.
Shifting electrodes 28a and 28b are also applie~ to the insulating -layer 27 but are separated from different portions of the sur-face of the substrate 21 by different thi^knesses of the layer 27 to constitute vertical transfer devices 29. Clock pulses 01 and 02 are apPlied to alternate sets of shift-ing electrodes 28a and 28b. As shown particularly in Fig. 5, the shifting electrodes 28a are applied over thin portions of the insulating ~yer 27. As shown particularly in Fig. 6, the shifting electrodec 28b are applied over thicker portions of the insulating layer 27. Each of the shifting electrodes 28a and 28b has an edge portion with a greater thickness of the layer 27 between it and the substrate 21 than the central por-tion of that shi~ting electrode. As shown in Fig. 4, the application of clock pulsec voltages of Yl = -15V and !~2-, .
_ 9 _ .
adjacent Ce~fi~6lo 5 8= OV to / electrodes 28a and 28b forms a stairli~e potential well 30 within t~ subctrate 21, The tran~ferring portion 24 incl~des an extended portion of the first shifting electrod2 28a separated from the sub-strate 21 by a relativeiy thick portion of the insulating layer 27 located between the photo-sencor 22 and the shift register 23 for that photo-sencor. As shown in Fig, 5, the potential 33a of the transfer portion 24 is higher than the potential 33b due to the shift regicter electrode 28a, In this embodi-ment, the thickness tl of the insulating layer 27 under the transfer portion 24 of the electrode 28a is larger than the thickness t2 of that portion of the layer 27 under the central part of the electrode 28a. The edge of this shifting electrdde 28a away from transfer portion 24 also has a relatively thick portion of the insulating layer 27 between it and the su'~;trate 2l to form a channel stopping region 30 in which the potential i8 relatively high to prevent the leakage of carriers from one vertical column to the next. A P+ region 31 extending vertically adjacent the region 30 also helps to isolate the vertical columns.
A voltage V9l is applied to the transparent electrode 26 to ~orm a deep potential well 33c, as shown in Fig, 5, when carriers are to be stored. A voltage Vs2 is applied to produce a shallow potential 33c~ which is higher than the potential 33b of the shift register 23, when the shifting electrode 28 has the lower (negative) level of the clock pulse applied to it. As a result, carriers stored in the photo-sensor 22 are transferred to the shift register 23, The potential 33c' of this part of the cemiconductor substrate 21 is lower than the ,' :
5~ 5 8 potential 33b' of the shlLt register 23 when the higher level of the clock pulse is ap?Lied to the elec,rode 28a of the shift register, The potential 33c in the potential well under the exposed part of the trans?arent electrode 26 ic, of course, raised to some extent acco.ding to the quantity of stored charges 35.
The overflow portion 2~ includes the opposite conductivity region 31 that extends vertically along the elements 22 on the substrate 21 and also includes a portion of the transparent electrode 26 on a thick section of the insulating layer 27 be-tween the photo-sensor 22 and the region 31. The overflow por-tion 32 has a potential 33d that is higher than the potential 33c of the photo-sensor 22 when the voltage Vsl is applied to the transparent electrode 26, The potential 33d is lower than the potential 33a of the tranferring portion 24 ~hen either the higher or the lower (more negative) level of the clock pulse is applied to the electrode 28a, Thus, when strong light i9 incident on the photo-censor ~2 so as to cause excessive voltage build-up due to the storage of an excessive number of carriers 35, the extra carriers 35a overflow to the region 31, to which a reverse bias i9 applied. Otherwise the surplus carriers, if they raised the potential 33c above the level of the ~arrier 33a, would flow into the shift register 23. The difference between the ~arriers 33a and 33d is indicated by a vertical measurement d, If surplus carriers flowed into ~;
the shift register 23, they would reduce the resolution of the image sensor.
In the embodiment ~ho-~ in Figs. 3-6, the thic~ness t3 ;
lOS~058 of the insulating layer 27 in the overflow portion 32 is greater than the thic~ness t4 in the portion of the photo-sensor 22 that operat2C in ctoring minority carriers. If the thickness tl is equal to the thickness t3 and if the thickness t2 is equal to the thickness t4, the voltage applied to the transparent electrode 26 is more negative than the lower (negative) leveL of the cLock pulse (~ lSVolts) applied to the shifting electrode 28 .
The transparent electrode 26 covers all of the insulating layer 27, but a light shield and conductive layer 34 covers most of the layer 26 except ~or the portion devoted to the photo-sensor 22.
Fig. 7 illustrates the method of manufacturing an image sen90r of the type just described in connection with Figs. 3-6.
A silicon dioxide layer 27a having a thickness ~f about .4 microns i9 formed on a major surface of the N type silicon substrate 21. The layer 27a is selectively etched, and P+ type regions 31 are diffused through the resulting windows 36 (Fig. 7A).
Thereafter the layer 27a is again selectively etched to form a silicon dioxide layer 27b having a thickness of .1 micron (Fig. 7~).
A first electrode 28a of doped poly-silicon is deposited on the portion 27b of the layer 27a and adjacent portions of the layer 27a. The electrode 28a also overLaps the adjacent channel stopping region 31 (Fig. 7C).
An additional silicon dioxide layer 27c having a thic~-:`~
: ness of about .3 micron ic formed over the entire exposed ~, surface (Fig. 7D). A cecond electrode 28b OL doped poly-silicon -;, .
` -12-1~35~058 (shown in Fig. 6) is ~electLvely deposited on the layer 27c to be vertically in line t~ith the electrode 28a.
- The layers 27a and 27c are selectively etched to form a thin silicon dioxide layer 27d having a thicknesc of about .1 micron in a region that will later become the photo-sensor 22 (Fig. 7E).
A transparent layer 26 of tin oxide or thin, doped poly-silicon is deposited over the entire exposed surface of the device (Fig. 7F).
A light shield layer 34 of aluminum is deposited on por-tions of the layer 26 except those that are to be used as the photo-sensor 22 (Fig. 7G).
The voltage pulses used in the operation of the device in Figs. 3-6 are shown in Figs. 8A-8C. Fig. 8A represents the voltage Vs applied to the transparent electrode 26. This voltage has a value of -20 volts corresponding to Vsl during the interval Tl corresponding to the visible part of a tele-vision field. The voltag2 Vs has a value of -10 volts corres-ponding to V92 during an interval of T2 that corresponds to the vertical blanking interval. Figs. 8B and 8C show clock pulses 01 and 02~ which are square wave pulses having a duty cycle twice t~e horiæontal line scanning interval of the tele-vision system with the polarity of 02 opposite to that of 01 Both of the pulses 01 and 02 have a positive value of Ovolts and a negative value of -15 volts, and they are applied to alternate shifting electrodes of the vertical shift register to be operated as a two-phase CCD
When the voltage Vsl of Fig. 8A is applied to the trans-1~5~0~8 parent el~ctrode 26, minor-ty carriers are generated in the photo-sensors 22 according to the strength of the ligh~ in-cident thereon and are stored at the potential well 33c, which is shown particularly in Fig. 5. When the voltage Vs2 is ap-plied and a cLock pulse vaLue of -15 volts is also applied to the shifting electrode 28a, the potential 33c' of the photo-sensor is made higher than the potential 33a of the transferring portion 24, and carrierC are transferred to the shift register 23. On the other hand, if the 0 volt value of the clock pulse is applied to the shift register 23,the potential 33cr of the photo-sensor 22 is lower than the potential 33a~ of the trans-fer portion 24, so that carriers are not transferred. Since the clock pulses 01 and 02 are applied in opposite polarity to adjacent sets of electrodec 28a and 28b? carriers are trans-ferred from alternate photo-sensors 22 to their respective shift registers 23, and carriers are transferred at 2Tl inter-vals in each cell.
Carriers simultaneously transferred from each photo-sensor 22 to the corresponding vertical shift register 23 are sequent-; ially transferred vertically by the cloc~ pulses 01 and 02.
Carriers from, for exampLe, odd numbered fields are thus in-serted into the horizontal CCD shift register at one line in-. tervals and are transferred to an output circuit during each line interval. After trans~2rring the carriers, which is equivalent to scanning the i~age optically produced on the semiconductor image sensor, in one field interval, the voltage Vs2 is applied to the trancparc~nt electrode 26, and carrierC
that correspond to even numbered fields are simultaneously ` . ''
4-~ QS~058 trancferred to the vertical Chift registers and are se4uent-ially read out by the horizo~tal shift register in the follow-ing field interval.
Figs. 9 and 10 show an improved embodiment of a hori-zontal three-phace CCD shift register 37 according to the invention, This Chift register has a first set of electrodes 44 made up of electrodes 44a, 44b, 44c,... and a second set of electrodes made up of electrodes 45a, 45b, 45c,......... These electrodes are formed on the surface of the semiconductor according to the method of manufacture of vertical shift regis- ;
ters, Each pair of corresponding first and second electrodes 44 and 45 is connected to each other to constitute shifting electrodes 46. The length ,~ of the three shifting electrodes 46 corresponds to the entire width of each basic element of the semiconductor image sensor,including a photo'-sensor 40, a transferring portion 39, a vertical shift register 38, and a channel stopper 41. Three phase clock pulses 01~ 02 and 03 are applied to sets of three shifting electrodes 46. Each shifting electrode 46 to which the lowest level pulse is applied has a stairlike potential well 47 so that carriers are collected at the well under the first electrode 44. Conse-quently the effective length of the shifting electrode 46 is equal to the length Ll of the first electrode 44 rather than to the length L of the shifting electrode 46. This raises t~e transfer speed and enables higher frequency driving clock pulses to be employed. While this invention has been described in terms of specific embodiments, it will be apparent to those, skilled in the art that modifications may be made therein within the true scope of the invention as defined by the following claims.
Figs. 9 and 10 show an improved embodiment of a hori-zontal three-phace CCD shift register 37 according to the invention, This Chift register has a first set of electrodes 44 made up of electrodes 44a, 44b, 44c,... and a second set of electrodes made up of electrodes 45a, 45b, 45c,......... These electrodes are formed on the surface of the semiconductor according to the method of manufacture of vertical shift regis- ;
ters, Each pair of corresponding first and second electrodes 44 and 45 is connected to each other to constitute shifting electrodes 46. The length ,~ of the three shifting electrodes 46 corresponds to the entire width of each basic element of the semiconductor image sensor,including a photo'-sensor 40, a transferring portion 39, a vertical shift register 38, and a channel stopper 41. Three phase clock pulses 01~ 02 and 03 are applied to sets of three shifting electrodes 46. Each shifting electrode 46 to which the lowest level pulse is applied has a stairlike potential well 47 so that carriers are collected at the well under the first electrode 44. Conse-quently the effective length of the shifting electrode 46 is equal to the length Ll of the first electrode 44 rather than to the length L of the shifting electrode 46. This raises t~e transfer speed and enables higher frequency driving clock pulses to be employed. While this invention has been described in terms of specific embodiments, it will be apparent to those, skilled in the art that modifications may be made therein within the true scope of the invention as defined by the following claims.
Claims (5)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A transfer gate-less photo sensor element for a semiconductor image sensor, said photo-sensor element comprising:
a substrate of one conductivity type;
an insulating layer on said substrate;
a first electrode on said insulating layer having first means for applying a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said substrate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode by said first means, a first region in said substrate which is a potential well for minority charge carriers in said substrate;
a second electrode in said insulating layer having second means for applying a potential to said second electrode, said second electrode having a second electrode portion adjacent one side of said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode portion being spaced from said substrate by a thickness of said insulating layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said substrate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a potential barrier for said minority charge carriers in said sub-strate relative to said potential well in said first region, and for defining with said third electrode portion in combination with the potential applied to said second electrode by said second means a third region in said substrate adjacent said second region and which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in said second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insulated from the latter by said insulating layer, said third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion overlapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than said thickness of the insulating layer which spaces said third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion cooperating with an adjacent portion of the other of said second and third electrodes to define an opening above said first region.
a substrate of one conductivity type;
an insulating layer on said substrate;
a first electrode on said insulating layer having first means for applying a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said substrate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode by said first means, a first region in said substrate which is a potential well for minority charge carriers in said substrate;
a second electrode in said insulating layer having second means for applying a potential to said second electrode, said second electrode having a second electrode portion adjacent one side of said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode portion being spaced from said substrate by a thickness of said insulating layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said substrate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a potential barrier for said minority charge carriers in said sub-strate relative to said potential well in said first region, and for defining with said third electrode portion in combination with the potential applied to said second electrode by said second means a third region in said substrate adjacent said second region and which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in said second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insulated from the latter by said insulating layer, said third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion overlapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than said thickness of the insulating layer which spaces said third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion cooperating with an adjacent portion of the other of said second and third electrodes to define an opening above said first region.
2. In a semiconductor image sensor composed of a plurality of charge-coupled transfer gate-less photo-sensor elements, each of said photo-sensor elements comprising:
a substrate of one conductivity type;
an insulating layer on said substrate;
a first electrode on said insulating layer having, first means for applying a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said substrate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode by said first means, a first region in said substrate which is a potential well for minority charge carriers in said substrate;
a second electrode in said insulating layer having second means for applying a potential to said second electrode, said second electrode having a second electrode portion adjacent one side of said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode portion being spaced from said substrate by a thickness of said insulating layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said substrate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a potential barrier for said minority charge carriers in said substrate relative to said potential well in said first region, and for defining with said third electrode portion, in combination with the potential applied to said second electrode by said second means, a third region in said substrate adjacent said second region which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in said second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insulated from the latter by said insulating layer, said third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion overlapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than the thickness of said insulating layer which spaced said third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion cooperating with an adjacent portion of the other of said second and third electrodes to define an opening above said first region;
said first electrode further including a connecting portion extending from said side of said first electrode to which said second electrode portion of said second electrode is adja-cent over said second electrode for connection to a first elec-trode portion of a first electrode of another of said photo-sensor elements, said insulating layer spacing said connecting portion of said first electrode from said second electrode.
a substrate of one conductivity type;
an insulating layer on said substrate;
a first electrode on said insulating layer having, first means for applying a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said substrate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode by said first means, a first region in said substrate which is a potential well for minority charge carriers in said substrate;
a second electrode in said insulating layer having second means for applying a potential to said second electrode, said second electrode having a second electrode portion adjacent one side of said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode portion being spaced from said substrate by a thickness of said insulating layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said substrate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a potential barrier for said minority charge carriers in said substrate relative to said potential well in said first region, and for defining with said third electrode portion, in combination with the potential applied to said second electrode by said second means, a third region in said substrate adjacent said second region which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in said second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insulated from the latter by said insulating layer, said third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion overlapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than the thickness of said insulating layer which spaced said third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion cooperating with an adjacent portion of the other of said second and third electrodes to define an opening above said first region;
said first electrode further including a connecting portion extending from said side of said first electrode to which said second electrode portion of said second electrode is adja-cent over said second electrode for connection to a first elec-trode portion of a first electrode of another of said photo-sensor elements, said insulating layer spacing said connecting portion of said first electrode from said second electrode.
3. A semiconductor image sensor composed of charge-couplet photo-sensor elements according to claim 2; in which at least said first electrode portion of said first electrode and said insulating layer are transparent for permitting the illuminating therethrough of said first region in said substrate to produce said minority charge carriers.
4. In a semiconductor image sensor composed of a plurality of charge-coupled transfer gate-less photo-sensor elements, each of said photo-sensor elements comprising:
a substrate of one conductivity type;
an insulating layer on said substrate;
a first electrode on said insulating layer having first means for applying a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said substrate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode by said first means, a first region in said substrate which is a potential well for minority charge carriers in said substrate;
a second electrode in said insulating layer having second means for applying a potential to said second electrode, said second electrode having a second electrode portion adjacent one side of said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode por-tion being spaced from said substrate by a thickness of said insula-ting layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said sub-strate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a potential barrier for said minority charge carriers in said substrate relative to said potential well in said first region, and for defining with said third electrode portion of said second electrode, in combin-ation with the potential applied to said second electrode by said second means, a third region in said substrate adjacent said second region and which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in said second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insu-lated from the latter by said insulating layer, said third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion overlapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than the thickness of said insulating layer which spaces said third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion cooper-ating with an adjacent portion of the other of said second and third electrodes to define an opening above said first region;
said first electrode further including a fifth electrode portion along a side thereof which is different from said side of said first electrode adjacent to said second electrode and which is spaced from said substrate by a thickness of said insulating layer greater than the thickness of said insulating layer which spaces said first electrode portion of said first electrode from said substrate for defining, in combination with the potential applied to said first electrode by said first means, a fourth region which is a potential barrier for said minority charge carriers relative to said potential well in said first region of said substrate, said potential barrier in said fourth region being lower than said potential barrier in said second region of said substrate to control the number of said minority charge carriers which can be stored in said potential well in said first region of said substrate.
a substrate of one conductivity type;
an insulating layer on said substrate;
a first electrode on said insulating layer having first means for applying a potential to said first electrode, said first electrode having a first electrode portion which is spaced from said substrate by a thickness of said insulating layer for defining, in combination with the potential applied to said first electrode by said first means, a first region in said substrate which is a potential well for minority charge carriers in said substrate;
a second electrode in said insulating layer having second means for applying a potential to said second electrode, said second electrode having a second electrode portion adjacent one side of said first electrode and an adjacent third electrode portion remote from said first electrode, said second electrode por-tion being spaced from said substrate by a thickness of said insula-ting layer which is greater than the thickness of said insulating layer which spaces said third electrode portion from said sub-strate for defining, in combination with the potential applied to said second electrode by said second means, a second region in said substrate adjacent said first region which is a potential barrier for said minority charge carriers in said substrate relative to said potential well in said first region, and for defining with said third electrode portion of said second electrode, in combin-ation with the potential applied to said second electrode by said second means, a third region in said substrate adjacent said second region and which is a potential well for said minority charge carriers in said substrate relative to said potential barrier in said second region; and a third electrode in said insulating layer and extending generally parallel to said second electrode and electrically insu-lated from the latter by said insulating layer, said third electrode being connected with said second means for receiving a potential therefrom, said third electrode having a fourth electrode portion overlapping said third electrode portion and being spaced from said substrate by a thickness of said insulating layer which is larger than the thickness of said insulating layer which spaces said third electrode portion from said substrate, at least one of said second and third electrodes having a cutout portion cooper-ating with an adjacent portion of the other of said second and third electrodes to define an opening above said first region;
said first electrode further including a fifth electrode portion along a side thereof which is different from said side of said first electrode adjacent to said second electrode and which is spaced from said substrate by a thickness of said insulating layer greater than the thickness of said insulating layer which spaces said first electrode portion of said first electrode from said substrate for defining, in combination with the potential applied to said first electrode by said first means, a fourth region which is a potential barrier for said minority charge carriers relative to said potential well in said first region of said substrate, said potential barrier in said fourth region being lower than said potential barrier in said second region of said substrate to control the number of said minority charge carriers which can be stored in said potential well in said first region of said substrate.
5. A semiconductor image sensor composed of a plurality of charge-coupled photo-sensor elements according to claim 4; in which said thickness of the insulating layer spacing said second electrode portion from said substrate is substantially equal to said thickness of the insulating layer spacing said fifth electrode portion from said substrate, and said thickness of the insulating layer spacing said first electrode portion from the substrate is substantially equal to said thickness of the insulating layer spacing said third electrode portion from the substrate; and in which said potential applied to said first electrode is larger than said potential applied to said second electrode.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP753860A JPS5732547B2 (en) | 1974-12-25 | 1974-12-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1056058A true CA1056058A (en) | 1979-06-05 |
Family
ID=11568935
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA242,395A Expired CA1056058A (en) | 1974-12-25 | 1975-12-23 | Semiconductor image sensor having ccd shift register |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPS5732547B2 (en) |
| CA (1) | CA1056058A (en) |
| DE (1) | DE2558337C2 (en) |
| FR (1) | FR2296266A1 (en) |
| GB (1) | GB1533001A (en) |
| NL (1) | NL7515024A (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2606308C2 (en) | 1976-02-17 | 1985-05-23 | Siemens AG, 1000 Berlin und 8000 München | Two-dimensional optoelectronic semiconductor sensor |
| JPS5374893A (en) * | 1976-12-15 | 1978-07-03 | Fujitsu Ltd | Driving method for semiconductor photosensitive device |
| JPS606147B2 (en) * | 1979-12-07 | 1985-02-15 | 株式会社東芝 | solid state imaging device |
| DE3044341C2 (en) * | 1980-11-25 | 1984-10-25 | Siemens AG, 1000 Berlin und 8000 München | Phototransistor |
| JPS6080272A (en) * | 1983-10-07 | 1985-05-08 | Canon Inc | Charge transfer element |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| IE35581B1 (en) * | 1970-09-04 | 1976-03-31 | Gen Electric | Semiconductor apparatus for selectively moving electrical charges |
| CA1106477A (en) * | 1972-07-10 | 1981-08-04 | Carlo H. Sequin | Overflow channel for charge transfer imaging devices |
-
1974
- 1974-12-25 JP JP753860A patent/JPS5732547B2/ja not_active Expired
-
1975
- 1975-12-23 CA CA242,395A patent/CA1056058A/en not_active Expired
- 1975-12-23 NL NL7515024A patent/NL7515024A/en not_active Application Discontinuation
- 1975-12-23 GB GB52649/75A patent/GB1533001A/en not_active Expired
- 1975-12-23 DE DE2558337A patent/DE2558337C2/en not_active Expired
- 1975-12-24 FR FR7539766A patent/FR2296266A1/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| DE2558337A1 (en) | 1976-07-08 |
| NL7515024A (en) | 1976-06-29 |
| DE2558337C2 (en) | 1983-04-14 |
| FR2296266A1 (en) | 1976-07-23 |
| JPS5175321A (en) | 1976-06-29 |
| GB1533001A (en) | 1978-11-22 |
| FR2296266B1 (en) | 1982-09-24 |
| JPS5732547B2 (en) | 1982-07-12 |
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