CA1008564A - Method of mos circuit fabrication - Google Patents

Method of mos circuit fabrication

Info

Publication number
CA1008564A
CA1008564A CA220,880A CA220880A CA1008564A CA 1008564 A CA1008564 A CA 1008564A CA 220880 A CA220880 A CA 220880A CA 1008564 A CA1008564 A CA 1008564A
Authority
CA
Canada
Prior art keywords
circuit fabrication
mos circuit
mos
fabrication
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA220,880A
Other languages
English (en)
Inventor
Robert L. Luce
James D. Sansbury
Joseph P. Perry
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fairchild Semiconductor Corp
Original Assignee
Fairchild Camera and Instrument Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fairchild Camera and Instrument Corp filed Critical Fairchild Camera and Instrument Corp
Application granted granted Critical
Publication of CA1008564A publication Critical patent/CA1008564A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
CA220,880A 1974-04-18 1975-02-27 Method of mos circuit fabrication Expired CA1008564A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US46183674A 1974-04-18 1974-04-18

Publications (1)

Publication Number Publication Date
CA1008564A true CA1008564A (en) 1977-04-12

Family

ID=23834119

Family Applications (1)

Application Number Title Priority Date Filing Date
CA220,880A Expired CA1008564A (en) 1974-04-18 1975-02-27 Method of mos circuit fabrication

Country Status (5)

Country Link
JP (1) JPS5543630B2 (ja)
CA (1) CA1008564A (ja)
DE (1) DE2516291A1 (ja)
FR (1) FR2268356B1 (ja)
GB (1) GB1494569A (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5534444A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Preparation of semiconductor device
JPS60138974A (ja) * 1983-12-27 1985-07-23 Fuji Electric Corp Res & Dev Ltd 絶縁ゲ−ト型電界効果トランジスタの製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3342650A (en) * 1964-02-10 1967-09-19 Hitachi Ltd Method of making semiconductor devices by double masking
DE1269738B (de) * 1964-10-20 1968-06-06 Telefunken Patent Verfahren zur Stabilisierung von Halbleiterbauelementen
US3514348A (en) * 1967-05-10 1970-05-26 Ncr Co Method for making semiconductor devices
US3574010A (en) * 1968-12-30 1971-04-06 Texas Instruments Inc Fabrication of metal insulator semiconductor field effect transistors

Also Published As

Publication number Publication date
FR2268356B1 (ja) 1982-05-14
JPS5543630B2 (ja) 1980-11-07
DE2516291A1 (de) 1975-11-06
FR2268356A1 (ja) 1975-11-14
GB1494569A (en) 1977-12-07
JPS50137481A (ja) 1975-10-31

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