BRPI0605071A - supermódulo de memória e sistema de computador - Google Patents

supermódulo de memória e sistema de computador

Info

Publication number
BRPI0605071A
BRPI0605071A BRPI0605071-9A BRPI0605071A BRPI0605071A BR PI0605071 A BRPI0605071 A BR PI0605071A BR PI0605071 A BRPI0605071 A BR PI0605071A BR PI0605071 A BRPI0605071 A BR PI0605071A
Authority
BR
Brazil
Prior art keywords
supermodule
memory
computer system
printed circuit
modules
Prior art date
Application number
BRPI0605071-9A
Other languages
English (en)
Inventor
Alan Michael Gulachenski
Satydev Kolli
Jan Hendrik Helbers
Original Assignee
Smart Modular Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Smart Modular Technologies Inc filed Critical Smart Modular Technologies Inc
Publication of BRPI0605071A publication Critical patent/BRPI0605071A/pt
Publication of BRPI0605071B1 publication Critical patent/BRPI0605071B1/pt

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/02Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09409Multiple rows of pads, lands, terminals or dummy patterns; Multiple rows of mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15Position of the PCB during processing
    • H05K2203/1572Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

SUPERMóDULO DE MEMóRIA E SISTEMA DE COMPUTADOR , compreendendo um supermódulo de memória que contém dois ou mais módulos de memória dispostos em uma placa de circuito impresso comum. O supermódulo de memória também compreende dois ou mais módulo de memória, cada qual compreendendo uma placa de circuito impresso. As placas de circuito impresso são conectadas por um circuito flexível. Todos os módulos em um supermódulo compartilham um único conjunto de pads de contato para estabelecer sinal de conexão com o sistema no qual o supermódulo é usado.
BRPI0605071A 2006-06-29 2006-11-09 supermódulo de memória e sistema de computador BRPI0605071B1 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/478,971 US20080002447A1 (en) 2006-06-29 2006-06-29 Memory supermodule utilizing point to point serial data links

Publications (2)

Publication Number Publication Date
BRPI0605071A true BRPI0605071A (pt) 2008-02-19
BRPI0605071B1 BRPI0605071B1 (pt) 2018-09-11

Family

ID=38876437

Family Applications (1)

Application Number Title Priority Date Filing Date
BRPI0605071A BRPI0605071B1 (pt) 2006-06-29 2006-11-09 supermódulo de memória e sistema de computador

Country Status (2)

Country Link
US (1) US20080002447A1 (pt)
BR (1) BRPI0605071B1 (pt)

Families Citing this family (40)

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US8327104B2 (en) * 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
KR101318116B1 (ko) * 2005-06-24 2013-11-14 구글 인코포레이티드 집적 메모리 코어 및 메모리 인터페이스 회로
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US8090897B2 (en) * 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8060774B2 (en) * 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US20080082763A1 (en) * 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US20080126690A1 (en) * 2006-02-09 2008-05-29 Rajan Suresh N Memory module with memory stack
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US20080028136A1 (en) * 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US7609567B2 (en) 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US9542352B2 (en) * 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8041881B2 (en) * 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US8359187B2 (en) * 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
KR101303518B1 (ko) 2005-09-02 2013-09-03 구글 인코포레이티드 Dram 적층 방법 및 장치
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US20080025136A1 (en) * 2006-07-31 2008-01-31 Metaram, Inc. System and method for storing at least a portion of information received in association with a first operation for use in performing a second operation
US20080028137A1 (en) * 2006-07-31 2008-01-31 Schakel Keith R Method and Apparatus For Refresh Management of Memory Modules
US7793043B2 (en) * 2006-08-24 2010-09-07 Hewlett-Packard Development Company, L.P. Buffered memory architecture
US20080180899A1 (en) * 2007-01-31 2008-07-31 Pearson Roger A Methods and systems for a multi-memory module
US8209479B2 (en) * 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
US9483437B2 (en) * 2007-09-28 2016-11-01 Intel Corporation Addressing multi-core advanced memory buffers
WO2010144624A1 (en) * 2009-06-09 2010-12-16 Google Inc. Programming of dimm termination resistance values
US9253893B1 (en) * 2012-07-06 2016-02-02 Brian K. Buchheit Method for reusable electronic computing components
CN104123234B (zh) * 2013-04-27 2017-04-05 华为技术有限公司 内存访问方法及内存系统

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US7324352B2 (en) * 2004-09-03 2008-01-29 Staktek Group L.P. High capacity thin module system and method
US20060049513A1 (en) * 2004-09-03 2006-03-09 Staktek Group L.P. Thin module system and method with thermal management
US7542297B2 (en) * 2004-09-03 2009-06-02 Entorian Technologies, Lp Optimized mounting area circuit module system and method
US20060053345A1 (en) * 2004-09-03 2006-03-09 Staktek Group L.P. Thin module system and method
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US7606049B2 (en) * 2004-09-03 2009-10-20 Entorian Technologies, Lp Module thermal management system and method
US7511968B2 (en) * 2004-09-03 2009-03-31 Entorian Technologies, Lp Buffered thin module system and method

Also Published As

Publication number Publication date
US20080002447A1 (en) 2008-01-03
BRPI0605071B1 (pt) 2018-09-11

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Legal Events

Date Code Title Description
B25M Entry on limitation or onus of patent assignment [chapter 25.13 patent gazette]

Owner name: SMART MODULAR TECHNOLOGIES, INC (US)

B15K Others concerning applications: alteration of classification

Free format text: AS CLASSIFICACOES ANTERIORES ERAM: H01L 25/00 , H01L 23/52 , H01L 23/538

Ipc: G11C 5/04 (1968.09), H05K 1/18 (1968.09)

Ipc: G11C 5/04 (1968.09), H05K 1/18 (1968.09)

B07A Application suspended after technical examination (opinion) [chapter 7.1 patent gazette]
B06A Patent application procedure suspended [chapter 6.1 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 10 (DEZ) ANOS CONTADOS A PARTIR DE 11/09/2018, OBSERVADAS AS CONDICOES LEGAIS.