BR9712529A - Circuito eletrônico de processamento de dados - Google Patents

Circuito eletrônico de processamento de dados

Info

Publication number
BR9712529A
BR9712529A BR9712529-6A BR9712529A BR9712529A BR 9712529 A BR9712529 A BR 9712529A BR 9712529 A BR9712529 A BR 9712529A BR 9712529 A BR9712529 A BR 9712529A
Authority
BR
Brazil
Prior art keywords
data
processing circuit
data processing
electronic data
data bus
Prior art date
Application number
BR9712529-6A
Other languages
English (en)
Inventor
Stefan Pfab
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BR9712529A publication Critical patent/BR9712529A/pt

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/60Protecting data
    • G06F21/606Protecting data by securing the transmission between two devices or processes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1408Protection against unauthorised use of memory or access to memory by using cryptography
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/82Protecting input, output or interconnection devices
    • G06F21/85Protecting input, output or interconnection devices interconnection devices, e.g. bus-connected or in-line devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86Secure or tamper-resistant housings

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Health & Medical Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Bioethics (AREA)
  • Storage Device Security (AREA)
  • Credit Cards Or The Like (AREA)
  • Communication Control (AREA)

Abstract

Patente de Invenção: <B>"CIRCUITO ELETRôNICO DE PROCESSAMENTO DE DADOS"<D>.Circuito eletrônico de processamento de dados, com um conjunto operacional (1, 101), tal como, por exemplo, um microprocessador, com pelo menos uma memória de dados (2, 3, 4, 5, 102, 103, 104, 105) e com um barramento de dados (106) que se estende entre a memória de dados (2, 3, 4, 5, 102, 103, 104, 105) e o conjunto operacional (1, 101). Nos circuitos eletrônicos de processamento de dados do gênero, a memória freqüentemente contém informações que não devem ser acessadas ao máximo possível. Por isso, é preciso tomar medidas de segurança contra manipulações do circuito eletrônico de processamento de dados. Por isso, é objetivo da invenção colocar à disposição um circuito eletrônico de processamento de dados do gênero, o qual apresente uma melhor proteção contra modificações indesejáveis. Esse objetivo é alcançado pela invenção através de um circuito eletrônico de processamento de dados do gênero, no qual, na zona entre a memória de dados (2, 3, 4, 5, 102, 103, 104, 105) e o barramento de dados e/ou na zona entre o conjunto operacional (1, 101) e o barramento de dados é previsto pelo menos um conjunto de codificação (20, 21, 22, 35, 107), sendo que o conjunto de codificação (20, 21, 22, 35, 107) é configurado de uma forma tal que o tráfego de dados entre o conjunto operacional (1, 101) e o barramento de dados, respectivamente entre a memória de dados (2, 3, 4, 5, 102, 103, 104, 105) e o barramento de dados pode ser codificado e/ou decodificado.
BR9712529-6A 1996-10-15 1997-09-15 Circuito eletrônico de processamento de dados BR9712529A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19642560A DE19642560A1 (de) 1996-10-15 1996-10-15 Elektronische Datenverarbeitungsschaltung
PCT/DE1997/002070 WO1998016883A1 (de) 1996-10-15 1997-09-15 Elektronische datenverarbeitungsschaltung

Publications (1)

Publication Number Publication Date
BR9712529A true BR9712529A (pt) 1999-10-19

Family

ID=7808837

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9712529-6A BR9712529A (pt) 1996-10-15 1997-09-15 Circuito eletrônico de processamento de dados

Country Status (10)

Country Link
US (1) US6195752B1 (pt)
EP (1) EP0932867B1 (pt)
JP (1) JP2000504137A (pt)
KR (1) KR100421629B1 (pt)
CN (1) CN1127692C (pt)
AT (1) ATE486320T1 (pt)
BR (1) BR9712529A (pt)
DE (2) DE19642560A1 (pt)
UA (1) UA52690C2 (pt)
WO (1) WO1998016883A1 (pt)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19828936A1 (de) * 1998-05-29 1999-12-02 Siemens Ag Verfahren und Vorrichtung zum Verarbeiten von Daten
JP4083925B2 (ja) 1999-06-24 2008-04-30 株式会社日立製作所 情報処理装置、カード部材および情報処理システム
FR2801751B1 (fr) * 1999-11-30 2002-01-18 St Microelectronics Sa Composant electronique de securite
JP3866105B2 (ja) 1999-12-02 2007-01-10 インフィネオン テクノロジーズ アクチエンゲゼルシャフト 暗号化機能を備えるマイクロプロセッサ装置
FR2802669B1 (fr) * 1999-12-15 2002-02-08 St Microelectronics Sa Procede non deterministe de transfert securise de donnees
FR2802668B1 (fr) * 1999-12-15 2002-02-08 St Microelectronics Sa Procede de transfert securise de donnees
JP3848573B2 (ja) 2000-01-18 2006-11-22 インフィネオン テクノロジーズ アクチエンゲゼルシャフト マイクロプロセッサシステム
FR2808360B1 (fr) * 2000-04-28 2002-06-28 Gemplus Card Int Procede de contre mesure dans un microcircuit mettant en oeuvre le procede et carte a puce comportant ledit microcircuit
DE10036372A1 (de) * 2000-07-18 2002-01-31 Univ Berlin Tech Sender, Empfänger sowie Sender- und Empfängeranordnung
JP3977592B2 (ja) 2000-12-28 2007-09-19 株式会社東芝 データ処理装置
JP4787434B2 (ja) * 2001-08-24 2011-10-05 富士通コンポーネント株式会社 暗号化方法、通信システム、データ入力装置
DE10164174A1 (de) * 2001-12-27 2003-07-17 Infineon Technologies Ag Datenverarbeidungsvorrichtung
FR2836735A1 (fr) * 2002-03-01 2003-09-05 Canal Plus Technologies Circuit integre et procede de gestion de la memoire programme d'un tel circuit integre
JP4173768B2 (ja) 2002-05-21 2008-10-29 松下電器産業株式会社 回路装置およびその動作方法
FR2853097B1 (fr) * 2003-03-24 2005-07-15 Innova Card Circuit programmable pourvu d'une memoire securisee
US7653802B2 (en) * 2004-08-27 2010-01-26 Microsoft Corporation System and method for using address lines to control memory usage
US7734926B2 (en) * 2004-08-27 2010-06-08 Microsoft Corporation System and method for applying security to memory reads and writes
US7822993B2 (en) * 2004-08-27 2010-10-26 Microsoft Corporation System and method for using address bits to affect encryption
US7444523B2 (en) 2004-08-27 2008-10-28 Microsoft Corporation System and method for using address bits to signal security attributes of data in the address space
US20060117122A1 (en) * 2004-11-04 2006-06-01 Intel Corporation Method and apparatus for conditionally obfuscating bus communications
US20070239605A1 (en) * 2006-04-06 2007-10-11 Peter Munguia Supporting multiple key ladders using a common private key set
CN100395733C (zh) * 2006-08-01 2008-06-18 浪潮齐鲁软件产业有限公司 提高金融税控专用soc芯片安全性的方法
DE102006055830A1 (de) * 2006-11-27 2008-05-29 Robert Bosch Gmbh Verfahren zum Schutz eines Steuergeräts vor Manipulation
US8588421B2 (en) * 2007-01-26 2013-11-19 Microsoft Corporation Cryptographic key containers on a USB token
DE102007007699A1 (de) * 2007-02-09 2008-08-14 IHP GmbH - Innovations for High Performance Microelectronics/Institut für innovative Mikroelektronik Reduktion von Seiten-Kanal-Informationen durch interagierende Krypto-Blocks
CN101839928B (zh) * 2009-03-19 2013-04-24 北京普源精电科技有限公司 数字示波器和数据存取方法
US20150317255A1 (en) * 2011-02-15 2015-11-05 Chengdu Haicun Ip Technology Llc Secure Printed Memory
US9870462B2 (en) * 2014-09-22 2018-01-16 Intel Corporation Prevention of cable-swap security attack on storage devices

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2099616A (en) * 1981-06-03 1982-12-08 Jpm Automatic Machines Ltd Improvements relating to microprocessor units
US4598170A (en) * 1984-05-17 1986-07-01 Motorola, Inc. Secure microprocessor
CH694306A5 (de) 1988-04-11 2004-11-15 Syspatronic Ag Spa Chipkarte.
JPH03276345A (ja) * 1990-03-27 1991-12-06 Toshiba Corp マイクロコントローラ
JPH04149652A (ja) * 1990-10-09 1992-05-22 Mitsubishi Electric Corp マイクロコンピュータ
DE4120398A1 (de) * 1991-06-20 1993-01-07 Standard Elektrik Lorenz Ag Datenverarbeitungsanlage
US5386469A (en) * 1993-08-05 1995-01-31 Zilog, Inc. Firmware encryption for microprocessor/microcomputer
AU1265195A (en) * 1993-12-06 1995-06-27 Telequip Corporation Secure computer memory card

Also Published As

Publication number Publication date
US6195752B1 (en) 2001-02-27
WO1998016883A1 (de) 1998-04-23
KR100421629B1 (ko) 2004-03-10
CN1127692C (zh) 2003-11-12
DE19642560A1 (de) 1998-04-16
UA52690C2 (uk) 2003-01-15
EP0932867A1 (de) 1999-08-04
EP0932867B1 (de) 2010-10-27
CN1233333A (zh) 1999-10-27
ATE486320T1 (de) 2010-11-15
KR20000049114A (ko) 2000-07-25
DE59713047D1 (de) 2010-12-09
JP2000504137A (ja) 2000-04-04

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Legal Events

Date Code Title Description
B09B Patent application refused [chapter 9.2 patent gazette]

Free format text: INDEFERIDO COM BASE NO ARTIGO 8O COMBINADO COM O ARTIGO 13 DA LPI.