BR9201999A - Controle de gravacao em memoria de computador pessoal - Google Patents

Controle de gravacao em memoria de computador pessoal

Info

Publication number
BR9201999A
BR9201999A BR929201999A BR9201999A BR9201999A BR 9201999 A BR9201999 A BR 9201999A BR 929201999 A BR929201999 A BR 929201999A BR 9201999 A BR9201999 A BR 9201999A BR 9201999 A BR9201999 A BR 9201999A
Authority
BR
Brazil
Prior art keywords
personal computer
computer memory
recording control
recording
memory
Prior art date
Application number
BR929201999A
Other languages
English (en)
Inventor
Don S Keener
Gregory J Moore
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR9201999A publication Critical patent/BR9201999A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4239—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with asynchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
BR929201999A 1991-06-06 1992-05-27 Controle de gravacao em memoria de computador pessoal BR9201999A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/711,245 US5586302A (en) 1991-06-06 1991-06-06 Personal computer system having storage controller with memory write control

Publications (1)

Publication Number Publication Date
BR9201999A true BR9201999A (pt) 1993-02-02

Family

ID=24857312

Family Applications (1)

Application Number Title Priority Date Filing Date
BR929201999A BR9201999A (pt) 1991-06-06 1992-05-27 Controle de gravacao em memoria de computador pessoal

Country Status (5)

Country Link
US (1) US5586302A (pt)
EP (1) EP0522698A1 (pt)
JP (1) JP2982839B2 (pt)
BR (1) BR9201999A (pt)
CA (1) CA2066001C (pt)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5719920A (en) * 1995-03-31 1998-02-17 The Messenger Group Llc Method and apparatus for processing and downloading sound messages onto a permanent memory of a communication package
US5790775A (en) * 1995-10-23 1998-08-04 Digital Equipment Corporation Host transparent storage controller failover/failback of SCSI targets and associated units
US6981759B2 (en) * 2002-04-30 2006-01-03 Hewlett-Packard Development Company, Lp. Substrate and method forming substrate for fluid ejection device
JP4391170B2 (ja) 2003-09-05 2009-12-24 株式会社日立製作所 データ転送装置の制御方法、データ転送回路、及びディスクアレイ装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4476522A (en) * 1981-03-09 1984-10-09 International Business Machines Corporation Programmable peripheral processing controller with mode-selectable address register sequencing
US4454575A (en) * 1980-12-29 1984-06-12 International Business Machines Corporation Shared memory system with access by specialized peripherals managed by controller initialized by supervisory CPU
US4709329A (en) * 1984-06-25 1987-11-24 Data General Corporation Input/output device controller for a data processing system
US4821170A (en) * 1987-04-17 1989-04-11 Tandem Computers Incorporated Input/output system for multiprocessors
US4933845A (en) * 1987-09-04 1990-06-12 Digital Equipment Corporation Reconfigurable bus
IT1222664B (it) * 1987-09-16 1990-09-12 Honeywell Bull Italiana S P A Circuito di pilotaggio di bus e di decodifica
US5175826A (en) * 1988-05-26 1992-12-29 Ibm Corporation Delayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385
US5070474A (en) * 1988-07-26 1991-12-03 Disk Emulation Systems, Inc. Disk emulation system
EP0420203A3 (en) * 1989-09-29 1991-06-19 Siemens Aktiengesellschaft Circuit for controlling a bidirectional bus drive

Also Published As

Publication number Publication date
EP0522698A1 (en) 1993-01-13
JP2982839B2 (ja) 1999-11-29
CA2066001A1 (en) 1992-12-07
CA2066001C (en) 1998-02-17
JPH05189155A (ja) 1993-07-30
US5586302A (en) 1996-12-17

Similar Documents

Publication Publication Date Title
DE59109081D1 (de) Zugriffskontrolle in Rechnernetzen
DE69432133D1 (de) Datenprozessor mit Cache-Speicher
DE69228360D1 (de) Registerlesekontrolle
BR8900567A (pt) Mecanismo e metodo de controle de dominio de capacidade em um sistema de computador
DE69415115T2 (de) Rechnerspeichersicherstellung
DE69226386D1 (de) Zugriffsteuerung in einem verteilten Rechnersystem
DE69427334D1 (de) Direktspeicherzugriffssteuerung
DE69122937D1 (de) Persönliches Rechnersystem mit Unterbrechungssteuerung
GB9204453D0 (en) Shared memory access and data structure access control
DE68925048D1 (de) Direktspeicherzugriffssteuerung
BR9201974A (pt) Sistema de computador pessoal com sinalizacao antecipada de controle de memoria
DE69222706T2 (de) Speichersteueranordnung
DE69427512D1 (de) Direktspeicherzugriffssteuerung
DE68927015D1 (de) Direktspeicherzugriffssteuerung
BR9201999A (pt) Controle de gravacao em memoria de computador pessoal
DE69224489T2 (de) Speicherzugriffssteuerung
DE69417077D1 (de) Festwertspeicher
DE4207085B8 (de) Datenleseschaltkreis
DK152089A (da) Databanekontrolsystem
DE69616245D1 (de) Datenprozessor mit Bussteuerung
DE68927853D1 (de) Informationsverarbeitungsvorrichtung mit Cache-Speicher
DE69324339T2 (de) Spurnachführungssteuerung in Bildaufzeichnungs- und/oder wiedergabegeräte
KR930015978U (ko) 데이타 판독회로
BR9201997A (pt) Controle de fluxo de dados num sistema de computador pessoal
KR920013122U (ko) Ibm 퍼스널 컴퓨터에서의 다개국어 제어장치

Legal Events

Date Code Title Description
FB36 Technical and formal requirements: requirement - article 36 of industrial property law
FA8 Dismissal: dismissal - article 36, par. 1 of industrial property law