BR7906736A - Aparelho para atribuicao e decomposicao de paginas virtuais seguintes para entrada/saida - Google Patents

Aparelho para atribuicao e decomposicao de paginas virtuais seguintes para entrada/saida

Info

Publication number
BR7906736A
BR7906736A BR7906736A BR7906736A BR7906736A BR 7906736 A BR7906736 A BR 7906736A BR 7906736 A BR7906736 A BR 7906736A BR 7906736 A BR7906736 A BR 7906736A BR 7906736 A BR7906736 A BR 7906736A
Authority
BR
Brazil
Prior art keywords
decomposing
assigning
appliance
entry
exit
Prior art date
Application number
BR7906736A
Other languages
English (en)
Inventor
W Hammer
D Lewis
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of BR7906736A publication Critical patent/BR7906736A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
BR7906736A 1978-10-23 1979-10-18 Aparelho para atribuicao e decomposicao de paginas virtuais seguintes para entrada/saida BR7906736A (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/953,656 US4231088A (en) 1978-10-23 1978-10-23 Allocating and resolving next virtual pages for input/output

Publications (1)

Publication Number Publication Date
BR7906736A true BR7906736A (pt) 1980-06-17

Family

ID=25494340

Family Applications (1)

Application Number Title Priority Date Filing Date
BR7906736A BR7906736A (pt) 1978-10-23 1979-10-18 Aparelho para atribuicao e decomposicao de paginas virtuais seguintes para entrada/saida

Country Status (7)

Country Link
US (1) US4231088A (pt)
EP (1) EP0010192B1 (pt)
JP (1) JPS5558881A (pt)
AU (1) AU534577B2 (pt)
BR (1) BR7906736A (pt)
DE (1) DE2964218D1 (pt)
ES (1) ES485179A1 (pt)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4320456A (en) * 1980-01-18 1982-03-16 International Business Machines Corporation Control apparatus for virtual address translation unit
US4520441A (en) * 1980-12-15 1985-05-28 Hitachi, Ltd. Data processing system
US4577274A (en) * 1983-07-11 1986-03-18 At&T Bell Laboratories Demand paging scheme for a multi-ATB shared memory processing system
DE3466103D1 (en) * 1984-04-06 1987-10-15 Siemens Ag Method and arrangement providing chronologically real memory addresses for direct access to the main memory by peripheral devices in a data processing system
US4677546A (en) * 1984-08-17 1987-06-30 Signetics Guarded regions for controlling memory access
JPH0656594B2 (ja) * 1985-05-07 1994-07-27 株式会社日立製作所 ベクトルプロセツサ
JP2636212B2 (ja) * 1985-05-27 1997-07-30 株式会社日立製作所 磁気デイスク装置
US4833604A (en) * 1986-01-13 1989-05-23 International Business Machines Corporation Method for the relocation of linked control blocks
JPH0644251B2 (ja) * 1986-08-28 1994-06-08 日本電気株式会社 デ−タ処理装置
US5127094A (en) * 1987-11-09 1992-06-30 Hitachi, Ltd. Virtual storage type computer system
JPH0291747A (ja) * 1988-09-29 1990-03-30 Hitachi Ltd 情報処理装置
US5125086A (en) * 1989-06-29 1992-06-23 Digital Equipment Corporation Virtual memory paging apparatus with variable size in-page clusters
EP0408810B1 (en) * 1989-07-20 1996-03-20 Kabushiki Kaisha Toshiba Multi processor computer system
US5269009A (en) * 1990-09-04 1993-12-07 International Business Machines Corporation Processor system with improved memory transfer means
US5559980A (en) * 1993-03-18 1996-09-24 Lucent Technologies Inc. Method and apparatus for detecting references to deallocated memory in a dynamic memory allocation system
US7093034B2 (en) * 2003-11-18 2006-08-15 Microsoft Corporation Method and apparatus for input management having a plurality of input provider types wherein staging area holds and allows access by external components
CN114896900B (zh) * 2022-07-15 2022-09-30 中国地质大学（武汉） 一种目标跟踪系统

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3786427A (en) * 1971-06-29 1974-01-15 Ibm Dynamic address translation reversed
US3839706A (en) * 1973-07-02 1974-10-01 Ibm Input/output channel relocation storage protect mechanism
US3976977A (en) * 1975-03-26 1976-08-24 Honeywell Information Systems, Inc. Processor for input-output processing system
US4092715A (en) * 1976-09-22 1978-05-30 Honeywell Information Systems Inc. Input-output unit having extended addressing capability

Also Published As

Publication number Publication date
ES485179A1 (es) 1980-06-16
EP0010192A1 (en) 1980-04-30
EP0010192B1 (en) 1982-12-08
AU5188079A (en) 1980-05-15
AU534577B2 (en) 1984-02-09
JPS5732429B2 (pt) 1982-07-10
JPS5558881A (en) 1980-05-01
DE2964218D1 (en) 1983-01-13
US4231088A (en) 1980-10-28

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Legal Events

Date Code Title Description
MK Patent expired

Effective date: 19941018