BR112018069707A2 - randomização de layout de espaço de endereços de variação no tempo - Google Patents
randomização de layout de espaço de endereços de variação no tempoInfo
- Publication number
- BR112018069707A2 BR112018069707A2 BR112018069707A BR112018069707A BR112018069707A2 BR 112018069707 A2 BR112018069707 A2 BR 112018069707A2 BR 112018069707 A BR112018069707 A BR 112018069707A BR 112018069707 A BR112018069707 A BR 112018069707A BR 112018069707 A2 BR112018069707 A2 BR 112018069707A2
- Authority
- BR
- Brazil
- Prior art keywords
- system service
- address space
- space layout
- time
- versions
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/55—Detecting local intrusion or implementing counter-measures
- G06F21/554—Detecting local intrusion or implementing counter-measures involving event detection and direct action
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
- G06F21/50—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
- G06F21/52—Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems during program execution, e.g. stack integrity ; Preventing unwanted data erasure; Buffer overflow
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/10—File systems; File servers
- G06F16/17—Details of further file system functions
- G06F16/1727—Details of free space management performed by the file system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/10—File systems; File servers
- G06F16/18—File system types
- G06F16/188—Virtual file systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/062—Securing storage systems
- G06F3/0623—Securing storage systems in relation to content
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Software Systems (AREA)
- Human Computer Interaction (AREA)
- Data Mining & Analysis (AREA)
- Databases & Information Systems (AREA)
- Computer Hardware Design (AREA)
- Stored Programmes (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
modalidades incluem dispositivos de computação, aparelhos e métodos implementados pelo aparelho para randomização de layout de espaço de endereços variável no tempo. o aparelho pode lançar primeira pluralidade de versões de um serviço de sistema e designar um layout de espaço de endereço virtual aleatório a cada uma dentre a primeira pluralidade de versões do serviço de sistema. o aparelho pode receber uma primeira solicitação para executar o serviço de sistema a partir de um primeiro aplicativo. o aparelho pode selecionar aleatoriamente uma primeira versão do serviço de sistema a partir da primeira pluralidade de versões do serviço de sistema, e executar o serviço de sistema utilizando os dados da primeira versão do serviço de sistema.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/087,198 US10013554B2 (en) | 2016-03-31 | 2016-03-31 | Time varying address space layout randomization |
PCT/US2017/019716 WO2017172164A1 (en) | 2016-03-31 | 2017-02-27 | Time varying address space layout randomization |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112018069707A2 true BR112018069707A2 (pt) | 2019-02-05 |
Family
ID=58358838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112018069707A BR112018069707A2 (pt) | 2016-03-31 | 2017-02-27 | randomização de layout de espaço de endereços de variação no tempo |
Country Status (9)
Country | Link |
---|---|
US (2) | US10013554B2 (pt) |
EP (1) | EP3437008A1 (pt) |
JP (1) | JP2019513270A (pt) |
KR (1) | KR20180125976A (pt) |
CN (1) | CN108885661A (pt) |
BR (1) | BR112018069707A2 (pt) |
CA (1) | CA3016005A1 (pt) |
TW (1) | TW201737150A (pt) |
WO (1) | WO2017172164A1 (pt) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015185071A1 (en) * | 2014-06-04 | 2015-12-10 | Giesecke & Devrient Gmbh | Method for enhanced security of computational device with multiple cores |
US10268601B2 (en) | 2016-06-17 | 2019-04-23 | Massachusetts Institute Of Technology | Timely randomized memory protection |
US10191791B2 (en) * | 2016-07-02 | 2019-01-29 | Intel Corporation | Enhanced address space layout randomization |
US10310991B2 (en) * | 2016-08-11 | 2019-06-04 | Massachusetts Institute Of Technology | Timely address space randomization |
US10481816B2 (en) * | 2017-10-18 | 2019-11-19 | Western Digital Technologies, Inc. | Dynamically assigning data latches |
GB2568527B (en) * | 2017-11-20 | 2020-04-15 | Trustonic Ltd | Address layout varying process |
US11070373B2 (en) * | 2018-02-21 | 2021-07-20 | Ebay Inc. | Masked key hopping |
KR102186221B1 (ko) * | 2018-11-29 | 2020-12-03 | 한국전자통신연구원 | 하드웨어 기반의 임베디드 시스템의 주소 공간 레이아웃 랜덤화 방법 및 이를 위한 장치 |
US11681794B2 (en) | 2021-04-07 | 2023-06-20 | Oracle International Corporation | ASLR bypass |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4875159A (en) * | 1987-12-22 | 1989-10-17 | Amdahl Corporation | Version management system using plural control fields for synchronizing two versions of files in a multiprocessor system |
EP1870814B1 (en) * | 2006-06-19 | 2014-08-13 | Texas Instruments France | Method and apparatus for secure demand paging for processor devices |
GB0504326D0 (en) * | 2005-03-02 | 2005-04-06 | Symbian Software Ltd | Dual mode operating system for a computing device |
US8756363B2 (en) * | 2011-07-07 | 2014-06-17 | Oracle International Corporation | Efficient storage of memory version data |
US8694738B2 (en) | 2011-10-11 | 2014-04-08 | Mcafee, Inc. | System and method for critical address space protection in a hypervisor environment |
-
2016
- 2016-03-31 US US15/087,198 patent/US10013554B2/en not_active Expired - Fee Related
-
2017
- 2017-02-27 EP EP17711838.7A patent/EP3437008A1/en not_active Withdrawn
- 2017-02-27 CN CN201780020930.5A patent/CN108885661A/zh active Pending
- 2017-02-27 BR BR112018069707A patent/BR112018069707A2/pt not_active Application Discontinuation
- 2017-02-27 JP JP2018550779A patent/JP2019513270A/ja active Pending
- 2017-02-27 KR KR1020187027765A patent/KR20180125976A/ko unknown
- 2017-02-27 CA CA3016005A patent/CA3016005A1/en not_active Abandoned
- 2017-02-27 WO PCT/US2017/019716 patent/WO2017172164A1/en active Application Filing
- 2017-03-06 TW TW106107191A patent/TW201737150A/zh unknown
-
2018
- 2018-07-02 US US16/025,932 patent/US20180314825A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP3437008A1 (en) | 2019-02-06 |
WO2017172164A1 (en) | 2017-10-05 |
JP2019513270A (ja) | 2019-05-23 |
TW201737150A (zh) | 2017-10-16 |
US10013554B2 (en) | 2018-07-03 |
US20180314825A1 (en) | 2018-11-01 |
CA3016005A1 (en) | 2017-10-05 |
CN108885661A (zh) | 2018-11-23 |
US20170286674A1 (en) | 2017-10-05 |
KR20180125976A (ko) | 2018-11-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
B11A | Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing | ||
B11Y | Definitive dismissal acc. article 33 of ipl - extension of time limit for request of examination expired | ||
B350 | Update of information on the portal [chapter 15.35 patent gazette] |