BR112018006051A2 - pacote de perfil baixo com dispositivo passivo - Google Patents
pacote de perfil baixo com dispositivo passivoInfo
- Publication number
- BR112018006051A2 BR112018006051A2 BR112018006051A BR112018006051A BR112018006051A2 BR 112018006051 A2 BR112018006051 A2 BR 112018006051A2 BR 112018006051 A BR112018006051 A BR 112018006051A BR 112018006051 A BR112018006051 A BR 112018006051A BR 112018006051 A2 BR112018006051 A2 BR 112018006051A2
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/19011—Structure including integrated passive components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/37—Effects of the manufacturing process
- H01L2924/37001—Yield
Abstract
um pacote de perfil baixo e técnicas relacionadas para uso e fabricação é provido. em um exemplo, um pacote de perfil baixo é provido. o pacote de perfil baixo inclui um circuito integrado exemplificativo (ic) (112) tendo uma face ativa (114), um dispositivo passivo integrado (ipd)(102) tendo uma face, e uma camada de redistribuição (rdl)(106, 108) disposta entre o ipd e o ic. o ic é incorporado em um substrato (104). a face ativa das faces de ic faceia a face do ipd em uma configuração face a face (f2f). ao menos um contato do ipd é disposto em uma configuração sobreposta relativa ao ic. o rdl é configurado para acoplar eletricamente o ipd com o ic. o rdl pode estar disposto entre o ipd e o ic, e pode ser incorporado no substrato, e pode ser configurado como um revestimento eletromagnético.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/865,749 US20170092594A1 (en) | 2015-09-25 | 2015-09-25 | Low profile package with passive device |
PCT/US2016/053101 WO2017053560A1 (en) | 2015-09-25 | 2016-09-22 | Low profile package with passive device |
Publications (1)
Publication Number | Publication Date |
---|---|
BR112018006051A2 true BR112018006051A2 (pt) | 2018-10-09 |
Family
ID=57047356
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112018006051A BR112018006051A2 (pt) | 2015-09-25 | 2016-09-22 | pacote de perfil baixo com dispositivo passivo |
Country Status (7)
Country | Link |
---|---|
US (1) | US20170092594A1 (pt) |
EP (1) | EP3353805A1 (pt) |
JP (1) | JP2018528620A (pt) |
CN (1) | CN107924907A (pt) |
BR (1) | BR112018006051A2 (pt) |
TW (1) | TW201724926A (pt) |
WO (1) | WO2017053560A1 (pt) |
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DE102016110862B4 (de) * | 2016-06-14 | 2022-06-30 | Snaptrack, Inc. | Modul und Verfahren zur Herstellung einer Vielzahl von Modulen |
US9748167B1 (en) * | 2016-07-25 | 2017-08-29 | United Microelectronics Corp. | Silicon interposer, semiconductor package using the same, and fabrication method thereof |
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JP6597576B2 (ja) * | 2016-12-08 | 2019-10-30 | 株式会社村田製作所 | インダクタ、および、dc−dcコンバータ |
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KR102632367B1 (ko) * | 2018-12-04 | 2024-02-02 | 삼성전기주식회사 | 반도체 패키지 |
CN109473404A (zh) * | 2018-12-06 | 2019-03-15 | 麦堆微电子技术(上海)有限公司 | 一种微波芯片封装结构 |
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US20150237732A1 (en) * | 2014-02-18 | 2015-08-20 | Qualcomm Incorporated | Low-profile package with passive device |
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-
2015
- 2015-09-25 US US14/865,749 patent/US20170092594A1/en not_active Abandoned
-
2016
- 2016-09-22 WO PCT/US2016/053101 patent/WO2017053560A1/en active Application Filing
- 2016-09-22 BR BR112018006051A patent/BR112018006051A2/pt not_active Application Discontinuation
- 2016-09-22 EP EP16775438.1A patent/EP3353805A1/en not_active Withdrawn
- 2016-09-22 CN CN201680049742.0A patent/CN107924907A/zh active Pending
- 2016-09-22 JP JP2018515029A patent/JP2018528620A/ja active Pending
- 2016-09-22 TW TW105130555A patent/TW201724926A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
JP2018528620A (ja) | 2018-09-27 |
TW201724926A (zh) | 2017-07-01 |
WO2017053560A1 (en) | 2017-03-30 |
EP3353805A1 (en) | 2018-08-01 |
CN107924907A (zh) | 2018-04-17 |
US20170092594A1 (en) | 2017-03-30 |
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