BR112018001728A2 - método para tempo de execução com base em tarefa, simplificado, para computação paralela eficiente - Google Patents

método para tempo de execução com base em tarefa, simplificado, para computação paralela eficiente

Info

Publication number
BR112018001728A2
BR112018001728A2 BR112018001728A BR112018001728A BR112018001728A2 BR 112018001728 A2 BR112018001728 A2 BR 112018001728A2 BR 112018001728 A BR112018001728 A BR 112018001728A BR 112018001728 A BR112018001728 A BR 112018001728A BR 112018001728 A2 BR112018001728 A2 BR 112018001728A2
Authority
BR
Brazil
Prior art keywords
task
computing device
pointer
parallel computing
efficient parallel
Prior art date
Application number
BR112018001728A
Other languages
English (en)
Portuguese (pt)
Inventor
Raman Arun
Robatmili Behnam
Calin Cascaval Gheorghe
Zhao Han
Montesinos Ortego Pablo
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112018001728A2 publication Critical patent/BR112018001728A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
BR112018001728A 2015-07-30 2016-06-23 método para tempo de execução com base em tarefa, simplificado, para computação paralela eficiente BR112018001728A2 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562198830P 2015-07-30 2015-07-30
US14/992,268 US10169105B2 (en) 2015-07-30 2016-01-11 Method for simplified task-based runtime for efficient parallel computing
PCT/US2016/038925 WO2017019212A1 (en) 2015-07-30 2016-06-23 Method for simplified task-based runtime for efficient parallel computing

Publications (1)

Publication Number Publication Date
BR112018001728A2 true BR112018001728A2 (pt) 2018-09-18

Family

ID=57882620

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112018001728A BR112018001728A2 (pt) 2015-07-30 2016-06-23 método para tempo de execução com base em tarefa, simplificado, para computação paralela eficiente

Country Status (9)

Country Link
US (1) US10169105B2 (enExample)
EP (2) EP3859523A1 (enExample)
JP (1) JP2018528515A (enExample)
KR (1) KR20180034440A (enExample)
CN (1) CN108431775A (enExample)
BR (1) BR112018001728A2 (enExample)
CA (1) CA2989166A1 (enExample)
TW (1) TWI726899B (enExample)
WO (1) WO2017019212A1 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10312459B2 (en) * 2016-01-27 2019-06-04 Nichem Fine Technology Co., Ltd. Compound and organic electronic device using the same
CN107562535A (zh) * 2017-08-02 2018-01-09 广东睿江云计算股份有限公司 一种基于任务调度的负载均衡方法、系统
GB2569270B (en) 2017-10-20 2020-02-19 Graphcore Ltd Parallel computing
CN108364162B (zh) * 2018-01-31 2020-11-27 深圳市融壹买信息科技有限公司 一种任务界面管理方法、系统及终端设备
US10387214B1 (en) * 2018-03-30 2019-08-20 Sas Institute Inc. Managing data processing in a distributed computing environment
CN110968404B (zh) * 2018-09-30 2023-04-28 阿里巴巴集团控股有限公司 一种设备数据处理方法及装置
CN115176229A (zh) * 2020-02-29 2022-10-11 华为技术有限公司 一种多核处理器、多核处理器处理方法及相关设备
CN114116243A (zh) * 2020-08-28 2022-03-01 华为技术有限公司 基于多核的数据处理方法及装置
US11803391B2 (en) * 2020-10-20 2023-10-31 Micron Technology, Inc. Self-scheduling threads in a programmable atomic unit
US11989583B2 (en) * 2021-03-31 2024-05-21 Arm Limited Circuitry and method
US20210318961A1 (en) * 2021-06-23 2021-10-14 Intel Corporation Mitigating pooled memory cache miss latency with cache miss faults and transaction aborts
EP4400967A4 (en) 2021-12-02 2024-10-16 Samsung Electronics Co., Ltd. ELECTRONIC DEVICE FOR BOOTING AN OPERATING SYSTEM USING MULTIPLE CORES AND METHOD OF OPERATING THE SAME

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0403229A1 (en) * 1989-06-13 1990-12-19 Digital Equipment Corporation Method and apparatus for scheduling tasks in repeated iterations in a digital data processing system having multiple processors
US7673304B2 (en) * 2003-02-18 2010-03-02 Microsoft Corporation Multithreaded kernel for graphics processing unit
CN1842770A (zh) * 2003-08-28 2006-10-04 美普思科技有限公司 一种在处理器中挂起和释放执行过程中计算线程的整体机制
US8024742B2 (en) 2003-09-30 2011-09-20 Jaluna S.A. Common program for switching between operation systems is executed in context of the high priority operating system when invoked by the high priority OS
US20080059677A1 (en) 2006-08-31 2008-03-06 Charles Jens Archer Fast interrupt disabling and processing in a parallel computing environment
JP5453825B2 (ja) * 2009-02-05 2014-03-26 日本電気株式会社 プログラム並列実行システム、マルチコアプロセッサ上のプログラム並列実行方法
US8611851B2 (en) * 2010-02-19 2013-12-17 Alcatel Lucent Accounting request processing in a communication network
US9128701B2 (en) * 2011-04-07 2015-09-08 Via Technologies, Inc. Generating constant for microinstructions from modified immediate field during instruction translation
US20130074088A1 (en) * 2011-09-19 2013-03-21 Timothy John Purcell Scheduling and management of compute tasks with different execution priority levels
US9921873B2 (en) * 2012-01-31 2018-03-20 Nvidia Corporation Controlling work distribution for processing tasks
US8918799B2 (en) 2012-03-30 2014-12-23 International Business Machines Corporation Method to utilize cores in different operating system partitions
US8789046B2 (en) 2012-03-30 2014-07-22 International Business Machines Corporation Method to embed a light-weight kernel in a full-weight kernel to provide a heterogeneous execution environment
US9710306B2 (en) 2012-04-09 2017-07-18 Nvidia Corporation Methods and apparatus for auto-throttling encapsulated compute tasks
US9256623B2 (en) * 2013-05-08 2016-02-09 Nvidia Corporation System, method, and computer program product for scheduling tasks associated with continuation thread blocks
US9015422B2 (en) * 2013-07-16 2015-04-21 Apple Inc. Access map-pattern match based prefetch unit for a processor
US9697005B2 (en) * 2013-12-04 2017-07-04 Analog Devices, Inc. Thread offset counter

Also Published As

Publication number Publication date
WO2017019212A1 (en) 2017-02-02
CA2989166A1 (en) 2017-02-02
EP3859523A1 (en) 2021-08-04
TW201717004A (zh) 2017-05-16
US20170031728A1 (en) 2017-02-02
TWI726899B (zh) 2021-05-11
CN108431775A (zh) 2018-08-21
KR20180034440A (ko) 2018-04-04
EP3329370A1 (en) 2018-06-06
US10169105B2 (en) 2019-01-01
JP2018528515A (ja) 2018-09-27

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Legal Events

Date Code Title Description
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

Free format text: REFERENTE A 7A ANUIDADE.

B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

Free format text: REFERENTE AO DESPACHO 8.6 PUBLICADO NA RPI 2728 DE 18/04/2023.