BR112017027644A2 - interface sdio única com várias unidades sdio - Google Patents

interface sdio única com várias unidades sdio

Info

Publication number
BR112017027644A2
BR112017027644A2 BR112017027644A BR112017027644A BR112017027644A2 BR 112017027644 A2 BR112017027644 A2 BR 112017027644A2 BR 112017027644 A BR112017027644 A BR 112017027644A BR 112017027644 A BR112017027644 A BR 112017027644A BR 112017027644 A2 BR112017027644 A2 BR 112017027644A2
Authority
BR
Brazil
Prior art keywords
sound
unit
audio
units
port
Prior art date
Application number
BR112017027644A
Other languages
English (en)
Inventor
Mcbirnie Steven
Szeto Victor
Original Assignee
Qualcomm Technologies Int Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Technologies Int Ltd filed Critical Qualcomm Technologies Int Ltd
Publication of BR112017027644A2 publication Critical patent/BR112017027644A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

a presente invenção se refere a um sistema e método que se comunicam com uma de duas ou mais unidades secure digital input output (sdio), das quais apenas uma unidade sdio responde quando está sendo endereçada. a unidade sdio tem uma porta de entrada de clock sdio, uma porta de saída de barramento de dados sdio e uma porta de comando bidirecional sdio. cada unidade sdio tem um indicador de endereço dentro dela, associado com cada unidade sdio. uma unidade sdio não responderá a um comando sdio, a menos que um endereço de unidade sdio codificado no comando sdio corresponda a seu indicador de endereço.
BR112017027644A 2015-06-22 2016-06-16 interface sdio única com várias unidades sdio BR112017027644A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/746,132 US10127172B2 (en) 2015-06-22 2015-06-22 Single SDIO interface with multiple SDIO units
PCT/EP2016/063962 WO2016207067A1 (en) 2015-06-22 2016-06-16 Single sdio interface with multiple sdio units

Publications (1)

Publication Number Publication Date
BR112017027644A2 true BR112017027644A2 (pt) 2018-08-28

Family

ID=56235794

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112017027644A BR112017027644A2 (pt) 2015-06-22 2016-06-16 interface sdio única com várias unidades sdio

Country Status (6)

Country Link
US (1) US10127172B2 (pt)
EP (1) EP3311293A1 (pt)
JP (1) JP2018523207A (pt)
CN (1) CN107771330A (pt)
BR (1) BR112017027644A2 (pt)
WO (1) WO2016207067A1 (pt)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10127172B2 (en) 2015-06-22 2018-11-13 Qualcomm Technologies International, Ltd. Single SDIO interface with multiple SDIO units
US9811485B2 (en) * 2015-06-22 2017-11-07 Qualcomm Incorporated Single relay SDIO interface with multiple SDIO units
US20190317893A1 (en) * 2018-04-13 2019-10-17 Hewlett Packard Enterprise Development Lp Addressable control space for integrated circuit hardware blocks
US11334402B2 (en) * 2019-09-10 2022-05-17 Qualcomm Incorporated SDIO chip-to-chip interconnect protocol extension for slow devices and power savings
CN110971621B (zh) * 2020-01-09 2023-07-11 成都三零嘉微电子有限公司 基于sdio接口的嵌入式多cpu互联电路、互联方法及驱动方法

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EP2306264A4 (en) 2008-05-26 2011-09-07 Sk Telecom Co Ltd MEMORY CARD SUPPLEMENTED BY A WIRELESS COMMUNICATION MODULE, TERMINAL FOR UTILIZING SUCH CARD, MEMORY CARD COMPRISING A WPAN COMMUNICATION MODULE, AND WPAN COMMUNICATION METHOD BASED ON THE USE OF SUCH CARD
US9483429B2 (en) 2008-07-14 2016-11-01 Texas Instruments Incorporated Unified input/output controller for integrated wireless devices
US8856501B2 (en) 2009-12-14 2014-10-07 Sandisk Technologies Inc. Method and system for controlling operation of interconnected devices by circulating host capability without a centralized manager
CN101835282B (zh) 2010-04-23 2012-11-07 华为终端有限公司 一种无线上网模块、用户终端、安全数码卡、无线通信方法
US8731002B2 (en) 2011-03-25 2014-05-20 Invensense, Inc. Synchronization, re-synchronization, addressing, and serialized signal processing for daisy-chained communication devices
CN102508804A (zh) 2011-10-20 2012-06-20 豪威科技(上海)有限公司 Sd/sdio主控制器
US20130143622A1 (en) 2011-12-02 2013-06-06 Huizhou Tcl Mobile Communication Co., Ltd. LTE Communication Card and LTE Communication System
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US8909833B2 (en) * 2012-09-26 2014-12-09 The United States Of America As Represented By The Secretary Of The Navy Systems, methods, and articles of manufacture to stream data
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US10127172B2 (en) 2015-06-22 2018-11-13 Qualcomm Technologies International, Ltd. Single SDIO interface with multiple SDIO units
US9830280B2 (en) 2015-06-22 2017-11-28 Qualcomm Incorporated Multiple access single SDIO interface with multiple SDIO units

Also Published As

Publication number Publication date
US10127172B2 (en) 2018-11-13
EP3311293A1 (en) 2018-04-25
CN107771330A (zh) 2018-03-06
WO2016207067A1 (en) 2016-12-29
US20160371214A1 (en) 2016-12-22
JP2018523207A (ja) 2018-08-16

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Legal Events

Date Code Title Description
B11A Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing
B11Y Definitive dismissal acc. article 33 of ipl - extension of time limit for request of examination expired