BR112017002547A2 - arquitetura de depuração de baixo consumo de energia para sistema em chips (socs) e sistemas - Google Patents

arquitetura de depuração de baixo consumo de energia para sistema em chips (socs) e sistemas

Info

Publication number
BR112017002547A2
BR112017002547A2 BR112017002547A BR112017002547A BR112017002547A2 BR 112017002547 A2 BR112017002547 A2 BR 112017002547A2 BR 112017002547 A BR112017002547 A BR 112017002547A BR 112017002547 A BR112017002547 A BR 112017002547A BR 112017002547 A2 BR112017002547 A2 BR 112017002547A2
Authority
BR
Brazil
Prior art keywords
debugging information
debugging
stamped
time
issuing
Prior art date
Application number
BR112017002547A
Other languages
English (en)
Inventor
Trp Babu
Kuehnis Rolf
Menon Sankaran
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of BR112017002547A2 publication Critical patent/BR112017002547A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0787—Storage of error reports, e.g. persistent data storage, storage using memory protection
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Preventing errors by testing or debugging software
    • G06F11/362—Software debugging
    • G06F11/3648—Software debugging using additional hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0709—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a distributed system consisting of a plurality of standalone computer nodes, e.g. clusters, client-server systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/079—Root cause analysis, i.e. error or fault diagnosis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0038—System on Chip

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Biomedical Technology (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)

Abstract

em uma modalidade, uma arquitetura de depuração para um processador/sistema em chip (soc) etc., inclui uma unidade de depuração central para receber um ou mais sinais de depuração funcionais, em que a unidade de depuração central é adicionalmente configurada para receber informações de depuração de pelo menos uma fonte de firmware, pelo menos uma fonte de software e pelo menos uma fonte de hardware, e para emitir informações de depuração compactadas; um módulo de rastreamento de sistema para receber as informações de depuração compactadas e para carimbar data e hora nas informações de depuração compactadas; uma interface de rastreamento paralelo para receber as informações de depuração compactadas com carimbo de data e hora e para paralelizar as informações de depuração compactadas com carimbo de data e hora; e uma unidade de emissão para emitir as informações de depuração compactadas com carimbo de data e hora paralelizadas em uma dentre uma pluralidade de rotas de saída. outras modalidades são descritas e reivindicadas.
BR112017002547A 2014-09-12 2015-08-13 arquitetura de depuração de baixo consumo de energia para sistema em chips (socs) e sistemas BR112017002547A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/484,427 US9753836B2 (en) 2014-09-12 2014-09-12 Low power debug architecture for system-on-chips (SoCs) and systems
PCT/US2015/044958 WO2016039924A1 (en) 2014-09-12 2015-08-13 LOW POWER DEBUG ARCHITECTURE FOR SYSTEM-ON-CHIPS (SOCs) AND SYSTEMS

Publications (1)

Publication Number Publication Date
BR112017002547A2 true BR112017002547A2 (pt) 2017-12-05

Family

ID=55454856

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112017002547A BR112017002547A2 (pt) 2014-09-12 2015-08-13 arquitetura de depuração de baixo consumo de energia para sistema em chips (socs) e sistemas

Country Status (7)

Country Link
US (1) US9753836B2 (pt)
EP (1) EP3191965A4 (pt)
JP (1) JP6490803B2 (pt)
KR (1) KR102191815B1 (pt)
CN (2) CN106575249B (pt)
BR (1) BR112017002547A2 (pt)
WO (1) WO2016039924A1 (pt)

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CN107704346B (zh) * 2017-08-08 2021-07-27 湖南国科微电子股份有限公司 Soc芯片调试方法及调试系统
US10606677B2 (en) * 2017-08-28 2020-03-31 American Megatrends International, Llc Method of retrieving debugging data in UEFI and computer system thereof
US10860332B2 (en) 2017-09-25 2020-12-08 Qualcomm Incorporated Multicore framework for use in pre-boot environment of a system-on-chip
US10962593B2 (en) 2018-04-03 2021-03-30 Samsung Electronics Co., Ltd. System on chip and operating method thereof
US10627881B2 (en) * 2018-04-12 2020-04-21 Qualcomm Incorporated Back power protection (BPP) in a system on a chip (SOC) with critical signaling scheme
KR102165747B1 (ko) * 2018-12-28 2020-10-14 성균관대학교산학협력단 보안성을 고려한 경량 크래시 리포트 기반 디버깅 방법
JP7242878B2 (ja) * 2019-02-19 2023-03-20 シーメンス インダストリー ソフトウェア インコーポレイテッド 無線機器検査装置
US10901871B2 (en) 2019-03-05 2021-01-26 Intel Corporation System, apparatus and method for dynamic multi-source tracing in a system
CN110149490A (zh) * 2019-06-14 2019-08-20 北京滴普科技有限公司 一种视频信号图像处理方法及系统
US20200285559A1 (en) * 2020-05-20 2020-09-10 Intel Corporation System, apparatus and method for dynamic tracing in a system having one or more virtualization environments
CN111949431B (zh) * 2020-08-27 2022-07-05 英业达科技有限公司 片上系统产品的致命错误提供方法与致命错误识别方法
CN112052132B (zh) * 2020-09-11 2022-09-06 厦门紫光展锐科技有限公司 通过sdio接口调试外挂芯片的方法、装置、设备和介质
US11620176B2 (en) * 2021-07-15 2023-04-04 Beijing Tenafe Electronic Technology Co., Ltd. Visualization system for debug or performance analysis of SOC systems
US11544210B1 (en) 2021-07-15 2023-01-03 Beijing Tenafe Electronic Technology Co., Ltd. Collection of runtime information for debug and analysis
US11630502B2 (en) 2021-07-30 2023-04-18 Advanced Micro Devices, Inc. Hierarchical state save and restore for device with varying power states
US11829312B2 (en) * 2021-12-31 2023-11-28 Snap Inc. Debug access of eyewear having multiple socs
CN115221070B (zh) * 2022-08-02 2023-06-20 无锡众星微系统技术有限公司 基于NVMe盘的片上系统诊断方法
CN116502576B (zh) * 2023-06-26 2023-10-20 北京象帝先计算技术有限公司 指令流跟踪验证方法及调试系统
CN117149694B (zh) * 2023-10-24 2024-02-23 南京芯驰半导体科技有限公司 基于多核异构的接口控制方法、装置及电子设备

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Also Published As

Publication number Publication date
CN106575249B (zh) 2020-05-26
KR102191815B1 (ko) 2020-12-16
JP6490803B2 (ja) 2019-03-27
EP3191965A4 (en) 2019-01-09
US9753836B2 (en) 2017-09-05
JP2017530464A (ja) 2017-10-12
CN106575249A (zh) 2017-04-19
US20160077905A1 (en) 2016-03-17
KR20170028995A (ko) 2017-03-14
CN111522745A (zh) 2020-08-11
EP3191965A1 (en) 2017-07-19
WO2016039924A1 (en) 2016-03-17

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Legal Events

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B11A Dismissal acc. art.33 of ipl - examination not requested within 36 months of filing
B11Y Definitive dismissal acc. article 33 of ipl - extension of time limit for request of examination expired