BR112016015465A2 - Sistema e método para a memorização e transmissão bidirecional em tempo real dos controles e dados para um processador com base em um sistema de hardware - Google Patents

Sistema e método para a memorização e transmissão bidirecional em tempo real dos controles e dados para um processador com base em um sistema de hardware

Info

Publication number
BR112016015465A2
BR112016015465A2 BR112016015465A BR112016015465A BR112016015465A2 BR 112016015465 A2 BR112016015465 A2 BR 112016015465A2 BR 112016015465 A BR112016015465 A BR 112016015465A BR 112016015465 A BR112016015465 A BR 112016015465A BR 112016015465 A2 BR112016015465 A2 BR 112016015465A2
Authority
BR
Brazil
Prior art keywords
data
controls
processor
memorization
transmission
Prior art date
Application number
BR112016015465A
Other languages
English (en)
Inventor
Forlani Paolo
Carbonera Antônio
Garavaglia Roberto
Original Assignee
Hermes Comm S R L S
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hermes Comm S R L S filed Critical Hermes Comm S R L S
Publication of BR112016015465A2 publication Critical patent/BR112016015465A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/06—Network architectures or network communication protocols for network security for supporting key management in a packet data network
    • H04L63/061—Network architectures or network communication protocols for network security for supporting key management in a packet data network for key exchange, e.g. in peer-to-peer networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/32—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials
    • H04L9/3247—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols including means for verifying the identity or authority of a user of the system or for message authentication, e.g. authorization, entity authentication, data integrity or data verification, non-repudiation, key authentication or verification of credentials involving digital signatures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0042—Universal serial bus [USB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
  • Telephonic Communication Services (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Character Discrimination (AREA)

Abstract

SISTEMA E MÉTODO PARA A MEMORIZAÇÃO E TRANSMISSÃO BIDIRECIONAL EM TEMPO REAL DOS CONTROLES E DADOS PARA UM PROCESSADOR COM BASE EM UM SISTEMA DE HARDWARE. Trata-se de um sistema em tempo real para a memorização e transmissão bidirecional dos controles e dados para um processador no processo de I/O, com periféricos em série externos - tais como computadores do tipo tablet gráfico e/ou digitalizadores para a assinatura manuscrita - que utiliza um meio externo para o armazenamento de dados estáticos de modo a constituir um armazenamento temporário de transmissão com capacidade de operar com a unidade periférica em série vista como um disco óptico virtual removível de "unidade USB". Somente é usado o arquivo constituído como uma sucessão sequencial linear de dados em setores de dimensões constantes, que podem ser compartilhados entre a unidade periférica em série (21) e o processador (24), sendo que ambos podem ler e gravar o mesmo, em instantes virtualmente coincidentes. É definida a transmissão de I/O assíncrono com blocos de dados com conteúdos na ordem do Kbyte e uma área de armazenamento realmente tão grande quanto desejado, definitivamente maior que um pacote de dados, usado como um armazenamento temporário para a passagem de dados que aguardam ser transmitidos.
BR112016015465A 2013-12-31 2014-12-16 Sistema e método para a memorização e transmissão bidirecional em tempo real dos controles e dados para um processador com base em um sistema de hardware BR112016015465A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT000728A ITRM20130728A1 (it) 2013-12-31 2013-12-31 Metodo di scambio comandi tramite disco usb e relativi dispositivi che ne permettono l¿implementazione.
PCT/IB2014/066965 WO2015101869A1 (en) 2013-12-31 2014-12-16 Method for exchanging controls through a usb disc and relative devices which allow the implementation thereof

Publications (1)

Publication Number Publication Date
BR112016015465A2 true BR112016015465A2 (pt) 2017-08-08

Family

ID=50239806

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016015465A BR112016015465A2 (pt) 2013-12-31 2014-12-16 Sistema e método para a memorização e transmissão bidirecional em tempo real dos controles e dados para um processador com base em um sistema de hardware

Country Status (17)

Country Link
US (1) US20160328354A1 (pt)
EP (1) EP3090348B1 (pt)
JP (1) JP6530762B2 (pt)
KR (1) KR20160103998A (pt)
CN (1) CN105917322B (pt)
AU (1) AU2014375052A1 (pt)
BR (1) BR112016015465A2 (pt)
CA (1) CA2935283A1 (pt)
EA (1) EA201691243A1 (pt)
ES (1) ES2674549T3 (pt)
HK (1) HK1225832A1 (pt)
IL (1) IL246243B (pt)
IT (1) ITRM20130728A1 (pt)
MX (1) MX2016008599A (pt)
SG (1) SG11201604867WA (pt)
TR (1) TR201808730T4 (pt)
WO (1) WO2015101869A1 (pt)

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Publication number Priority date Publication date Assignee Title
CN106250057B (zh) * 2016-07-26 2019-06-04 青岛海信移动通信技术股份有限公司 一种显示存储设备的方法和装置
CN114089916B (zh) * 2018-01-12 2022-12-20 珠海极海半导体有限公司 数据采集系统和温湿度传感器系统
KR20190138336A (ko) 2018-06-05 2019-12-13 현대자동차주식회사 운송 수단용 리튬 이차 전지 및 이의 제조 방법
CN109375875B (zh) * 2018-10-11 2020-03-17 北京明朝万达科技股份有限公司 文件传输方法和装置

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JP2932568B2 (ja) * 1990-02-15 1999-08-09 松下電器産業株式会社 データ通信装置
JP3816180B2 (ja) * 1997-03-14 2006-08-30 株式会社日立コミュニケーションテクノロジー 通信装置のインターフェイス制御方法
JPH11339447A (ja) * 1998-05-29 1999-12-10 Sony Corp 記録再生装置
US6307955B1 (en) * 1998-12-18 2001-10-23 Topaz Systems, Inc. Electronic signature management system
US20040193785A1 (en) * 2003-03-11 2004-09-30 Zayas Fernando A. System for improving the performance of read/write testing in a hard drive
EP1782287A2 (en) * 2004-07-21 2007-05-09 Beach Unlimited LLC Distributed storage architecture based on block map caching and vfs stackable file system modules
JP2006202051A (ja) * 2005-01-20 2006-08-03 Canon Inc データ処理装置及びデータ処理方法
RO121497B1 (ro) * 2005-02-09 2007-06-29 Softwin S.R.L. Sistem informatic şi metodă pentru achiziţia, analiza şi autentificarea semnăturii olografe
EP1894106A2 (en) * 2005-06-09 2008-03-05 Nxp B.V. Memory controller and method for coupling a network and a memory
US7594067B2 (en) * 2005-10-20 2009-09-22 Stec, Inc. Enhanced data access in a storage device
JP4357473B2 (ja) * 2005-11-04 2009-11-04 株式会社ソニー・コンピュータエンタテインメント データ処理システムおよびプログラム
JP4663577B2 (ja) * 2006-05-16 2011-04-06 株式会社バッファロー データ記憶装置およびこの初期化方法
CN101252536B (zh) * 2008-03-31 2010-06-02 清华大学 路由器多队列数据包缓存管理与输出队列调度系统
US8370835B2 (en) * 2009-03-12 2013-02-05 Arend Erich Dittmer Method for dynamically generating a configuration for a virtual machine with a virtual hard disk in an external storage device
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CN101997646B (zh) * 2010-05-25 2012-11-28 锐骐(厦门)电子科技有限公司 基于usb和nand flash的数据打包和传输的方法
ITRM20110370A1 (it) 2011-07-15 2013-01-16 Prb S R L Sistema stilo-tavoletta grafica per la presentazione ed il confronto della firma biometrica autografa.
ITRM20110652A1 (it) 2011-12-07 2013-06-08 Prb S R L Unità di digitalizzazione ed archiviazione dei documenti e relative tecniche di virtualizzazione degli aggiornamenti.

Also Published As

Publication number Publication date
US20160328354A1 (en) 2016-11-10
JP2017507438A (ja) 2017-03-16
IL246243A0 (en) 2016-07-31
CA2935283A1 (en) 2015-07-09
ES2674549T3 (es) 2018-07-02
HK1225832A1 (zh) 2017-09-15
IL246243B (en) 2019-03-31
JP6530762B2 (ja) 2019-06-12
TR201808730T4 (tr) 2018-07-23
EP3090348A1 (en) 2016-11-09
ITRM20130728A1 (it) 2015-07-01
WO2015101869A1 (en) 2015-07-09
CN105917322B (zh) 2020-08-07
SG11201604867WA (en) 2016-07-28
AU2014375052A1 (en) 2016-07-07
EP3090348B1 (en) 2018-03-21
KR20160103998A (ko) 2016-09-02
MX2016008599A (es) 2017-04-13
EA201691243A1 (ru) 2016-12-30
CN105917322A (zh) 2016-08-31

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Legal Events

Date Code Title Description
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B11B Dismissal acc. art. 36, par 1 of ipl - no reply within 90 days to fullfil the necessary requirements