Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
  • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
  • G06F1/10—Distribution of clock signals, e.g. skew
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
  • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
  • G06F1/08—Clock generators with changeable or programmable clock frequency
• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
  • G06F12/02—Addressing or allocation; Relocation
  • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
  • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
  • G06F12/0893—Caches characterised by their organisation or structure
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C16/00—Erasable programmable read-only memories
  • G11C16/02—Erasable programmable read-only memories electrically programmable
  • G11C16/06—Auxiliary circuits, e.g. for writing into memory
  • G11C16/32—Timing circuits
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
  • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
  • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

Landscapes

• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• Physics & Mathematics (AREA)
• General Engineering & Computer Science (AREA)
• General Physics & Mathematics (AREA)
• Power Sources (AREA)
• Transceivers (AREA)
• Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
• Structure Of Receivers (AREA)
• Transmitters (AREA)
• Cooling Or The Like Of Electrical Apparatus (AREA)
• Electric Clocks (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=45788598

Family Applications (1)

Country Status (10)

Family Cites Families (22)

• 2012
  • 2012-01-09 GB GBGB1200219.2A patent/GB201200219D0/en not_active Ceased
• 2013
  • 2013-01-09 EP EP13708866.2A patent/EP2802957A1/en not_active Withdrawn
  • 2013-01-09 CA CA2863116A patent/CA2863116A1/en not_active Abandoned
  • 2013-01-09 WO PCT/GB2013/050027 patent/WO2013104899A1/en active Application Filing
  • 2013-01-09 US US14/370,915 patent/US20140379967A1/en not_active Abandoned
  • 2013-01-09 CN CN201810036338.0A patent/CN108170204A/zh active Pending
  • 2013-01-09 BR BR112014016796A patent/BR112014016796A2/pt not_active Application Discontinuation
  • 2013-01-09 CN CN201380005039.6A patent/CN104185822A/zh active Pending
  • 2013-01-09 KR KR1020147021486A patent/KR20140110033A/ko not_active Application Discontinuation
  • 2013-01-09 RU RU2014132893A patent/RU2639697C2/ru not_active IP Right Cessation
  • 2013-01-09 JP JP2014550761A patent/JP2015504216A/ja active Pending

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