BR102014024441A2 - método para otimização de parâmetro em inicialização de sistema e aparelho utilizando o mesmo - Google Patents
método para otimização de parâmetro em inicialização de sistema e aparelho utilizando o mesmo Download PDFInfo
- Publication number
- BR102014024441A2 BR102014024441A2 BR102014024441A BR102014024441A BR102014024441A2 BR 102014024441 A2 BR102014024441 A2 BR 102014024441A2 BR 102014024441 A BR102014024441 A BR 102014024441A BR 102014024441 A BR102014024441 A BR 102014024441A BR 102014024441 A2 BR102014024441 A2 BR 102014024441A2
- Authority
- BR
- Brazil
- Prior art keywords
- dram
- parameter
- write
- read
- dqs
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
- G06F13/1689—Synchronisation and timing concerns
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| MYPI2014700731 | 2014-03-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BR102014024441A2 true BR102014024441A2 (pt) | 2016-08-02 |
Family
ID=54166044
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BR102014024441A BR102014024441A2 (pt) | 2014-03-26 | 2014-09-30 | método para otimização de parâmetro em inicialização de sistema e aparelho utilizando o mesmo |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN104951376A (zh) |
| BR (1) | BR102014024441A2 (zh) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106528323B (zh) * | 2016-11-04 | 2019-07-30 | 郑州云海信息技术有限公司 | 一种Nand flash数据校准方法及系统 |
| CN108646984B (zh) * | 2018-05-16 | 2020-01-03 | 华为技术有限公司 | 一种dqs位置调整方法和装置 |
| CN111627475B (zh) * | 2019-04-04 | 2022-12-13 | 深圳市晶凯电子技术有限公司 | 存储器和其电子装置及其测试系统、测试方法和应用方法 |
| CN110489169B (zh) * | 2019-08-06 | 2021-10-19 | 晶晨半导体(上海)股份有限公司 | 一种片上系统的存储器快速启动方法 |
| CN111858195A (zh) * | 2020-06-10 | 2020-10-30 | 瑞芯微电子股份有限公司 | Dram接口读校验的接口参数适配方法及存储介质 |
| CN114356229B (zh) * | 2021-12-22 | 2023-09-22 | 合肥康芯威存储技术有限公司 | 一种数据存储设备的参数优化方法及其优化系统 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6567941B1 (en) * | 2000-04-12 | 2003-05-20 | Advantest Corp. | Event based test system storing pin calibration data in non-volatile memory |
| US7698589B2 (en) * | 2006-03-21 | 2010-04-13 | Mediatek Inc. | Memory controller and device with data strobe calibration |
| US7558132B2 (en) * | 2007-03-30 | 2009-07-07 | International Business Machines Corporation | Implementing calibration of DQS sampling during synchronous DRAM reads |
| US7865660B2 (en) * | 2007-04-16 | 2011-01-04 | Montage Technology Group Ltd. | Calibration of read/write memory access via advanced memory buffer |
| KR101470975B1 (ko) * | 2007-12-21 | 2014-12-09 | 램버스 인코포레이티드 | 메모리 시스템 내 기록 타이밍을 교정하기 위한 방법 및 장치 |
-
2014
- 2014-09-30 BR BR102014024441A patent/BR102014024441A2/pt active Search and Examination
-
2015
- 2015-02-26 CN CN201510087574.1A patent/CN104951376A/zh active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CN104951376A (zh) | 2015-09-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| B03A | Publication of a patent application or of a certificate of addition of invention [chapter 3.1 patent gazette] | ||
| B06F | Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette] | ||
| B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
| B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
| B11D | Dismissal acc. art. 38, par 2 of ipl - failure to pay fee after grant in time |