BG45007A1 - - Google Patents

Info

Publication number
BG45007A1
BG45007A1 BG8778956A BG7895687A BG45007A1 BG 45007 A1 BG45007 A1 BG 45007A1 BG 8778956 A BG8778956 A BG 8778956A BG 7895687 A BG7895687 A BG 7895687A BG 45007 A1 BG45007 A1 BG 45007A1
Authority
BG
Bulgaria
Application number
BG8778956A
Inventor
Khristo A Turlakov
Venelin G Barbutov
Dobrin G Borshukov
Irena G Khristova
Nikolajj K Kokalichev
Original Assignee
Khristo A Turlakov
Venelin G Barbutov
Dobrin G Borshukov
Irena G Khristova
Nikolajj K Kokalichev
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Khristo A Turlakov, Venelin G Barbutov, Dobrin G Borshukov, Irena G Khristova, Nikolajj K Kokalichev filed Critical Khristo A Turlakov
Priority to BG8778956A priority Critical patent/BG45007A1/xx
Priority to GB08806257A priority patent/GB2202351A/en
Priority to JP63065609A priority patent/JPS6426262A/ja
Priority to DE3809234A priority patent/DE3809234A1/de
Priority to IT47747/88A priority patent/IT1219875B/it
Priority to DD88313819A priority patent/DD289678A7/de
Publication of BG45007A1 publication Critical patent/BG45007A1/xx

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
BG8778956A 1987-03-19 1987-03-19 BG45007A1 (enrdf_load_html_response)

Priority Applications (6)

Application Number Priority Date Filing Date Title
BG8778956A BG45007A1 (enrdf_load_html_response) 1987-03-19 1987-03-19
GB08806257A GB2202351A (en) 1987-03-19 1988-03-16 Plural bit-width microprocessor system
JP63065609A JPS6426262A (en) 1987-03-19 1988-03-18 16 bit microprocessor system
DE3809234A DE3809234A1 (de) 1987-03-19 1988-03-18 16-bit-mikroprozessorsystem
IT47747/88A IT1219875B (it) 1987-03-19 1988-03-18 Sistema a microprocessore da 16 bit
DD88313819A DD289678A7 (de) 1987-03-19 1988-03-18 16-bit-microprozessorsystem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
BG8778956A BG45007A1 (enrdf_load_html_response) 1987-03-19 1987-03-19

Publications (1)

Publication Number Publication Date
BG45007A1 true BG45007A1 (enrdf_load_html_response) 1989-03-15

Family

ID=3918722

Family Applications (1)

Application Number Title Priority Date Filing Date
BG8778956A BG45007A1 (enrdf_load_html_response) 1987-03-19 1987-03-19

Country Status (6)

Country Link
JP (1) JPS6426262A (enrdf_load_html_response)
BG (1) BG45007A1 (enrdf_load_html_response)
DD (1) DD289678A7 (enrdf_load_html_response)
DE (1) DE3809234A1 (enrdf_load_html_response)
GB (1) GB2202351A (enrdf_load_html_response)
IT (1) IT1219875B (enrdf_load_html_response)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3900348A1 (de) * 1989-01-07 1990-07-12 Diehl Gmbh & Co Universelles bus-system
JP2502403B2 (ja) * 1990-07-20 1996-05-29 三菱電機株式会社 Ｄｍａ制御装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4109310A (en) * 1973-08-06 1978-08-22 Xerox Corporation Variable field length addressing system having data byte interchange
GB2021823B (en) * 1978-05-30 1983-04-27 Intel Corp Data transfer system
BG44516A1 (en) * 1984-05-08 1988-12-15 Khristo A Turlakov Device for connecting of 16- digits microprocessor system with 8- digits modules
US4716527A (en) * 1984-12-10 1987-12-29 Ing. C. Olivetti Bus converter
JPS61175845A (ja) * 1985-01-31 1986-08-07 Toshiba Corp マイクロプロセツサシステム
BG39765A1 (en) * 1985-02-14 1986-08-15 Turlakov Device for connecting 8- degree and 16- degree modules to 16- degree microprocessor system
JP2609220B2 (ja) * 1985-03-15 1997-05-14 ソニー株式会社 マルチ・プロセツサ・システム

Also Published As

Publication number Publication date
IT1219875B (it) 1990-05-24
JPS6426262A (en) 1989-01-27
DE3809234A1 (de) 1988-10-06
GB2202351A (en) 1988-09-21
IT8847747A0 (it) 1988-03-18
GB8806257D0 (en) 1988-04-13
DD289678A7 (de) 1991-05-08

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