BE825855A - PROCESS FOR OBTAINING FULLY ISOLATED ISLANDS FOR INTEGRATED CIRCUITS OF THE MOS OR BIPOLAR TYPE - Google Patents

PROCESS FOR OBTAINING FULLY ISOLATED ISLANDS FOR INTEGRATED CIRCUITS OF THE MOS OR BIPOLAR TYPE

Info

Publication number
BE825855A
BE825855A BE1006473A BE1006473A BE825855A BE 825855 A BE825855 A BE 825855A BE 1006473 A BE1006473 A BE 1006473A BE 1006473 A BE1006473 A BE 1006473A BE 825855 A BE825855 A BE 825855A
Authority
BE
Belgium
Prior art keywords
mos
integrated circuits
bipolar type
isolated islands
fully isolated
Prior art date
Application number
BE1006473A
Other languages
French (fr)
Inventor
V Rodriguez
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE825855A publication Critical patent/BE825855A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297—Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Element Separation (AREA)
  • Weting (AREA)
  • Recrystallisation Techniques (AREA)
BE1006473A 1974-02-26 1975-02-24 PROCESS FOR OBTAINING FULLY ISOLATED ISLANDS FOR INTEGRATED CIRCUITS OF THE MOS OR BIPOLAR TYPE BE825855A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7406492A FR2262406B1 (en) 1974-02-26 1974-02-26

Publications (1)

Publication Number Publication Date
BE825855A true BE825855A (en) 1975-08-25

Family

ID=9135457

Family Applications (1)

Application Number Title Priority Date Filing Date
BE1006473A BE825855A (en) 1974-02-26 1975-02-24 PROCESS FOR OBTAINING FULLY ISOLATED ISLANDS FOR INTEGRATED CIRCUITS OF THE MOS OR BIPOLAR TYPE

Country Status (7)

Country Link
JP (1) JPS50126181A (en)
BE (1) BE825855A (en)
DE (1) DE2508091A1 (en)
FR (1) FR2262406B1 (en)
GB (1) GB1480129A (en)
IT (1) IT1030218B (en)
NL (1) NL7502154A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5086011A (en) * 1987-01-27 1992-02-04 Advanced Micro Devices, Inc. Process for producing thin single crystal silicon islands on insulator

Also Published As

Publication number Publication date
FR2262406A1 (en) 1975-09-19
NL7502154A (en) 1975-08-28
FR2262406B1 (en) 1982-02-19
DE2508091A1 (en) 1975-08-28
JPS50126181A (en) 1975-10-03
GB1480129A (en) 1977-07-20
IT1030218B (en) 1979-03-30

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: COMPAGNIE INTERNATIONALE POUR L'INFORMATIQUE

Effective date: 19840224