BE823750A - Dispositif d'adressage d'une memoire de commande - Google Patents

Dispositif d'adressage d'une memoire de commande

Info

Publication number
BE823750A
BE823750A BE1006351A BE1006351A BE823750A BE 823750 A BE823750 A BE 823750A BE 1006351 A BE1006351 A BE 1006351A BE 1006351 A BE1006351 A BE 1006351A BE 823750 A BE823750 A BE 823750A
Authority
BE
Belgium
Prior art keywords
addressing
command memory
command
memory
Prior art date
Application number
BE1006351A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE823750A publication Critical patent/BE823750A/fr

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/328Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for runtime instruction patching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262Arrangements for next microinstruction selection
    • G06F9/268Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Storage Device Security (AREA)
BE1006351A 1973-12-27 1974-12-23 Dispositif d'adressage d'une memoire de commande BE823750A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7346459A FR2256705A5 (fr) 1973-12-27 1973-12-27

Publications (1)

Publication Number Publication Date
BE823750A true BE823750A (fr) 1975-06-23

Family

ID=9129737

Family Applications (1)

Application Number Title Priority Date Filing Date
BE1006351A BE823750A (fr) 1973-12-27 1974-12-23 Dispositif d'adressage d'une memoire de commande

Country Status (8)

Country Link
US (1) US3959783A (fr)
BE (1) BE823750A (fr)
DE (1) DE2461527C3 (fr)
ES (1) ES433380A1 (fr)
FR (1) FR2256705A5 (fr)
GB (1) GB1488271A (fr)
IT (1) IT1027017B (fr)
NL (1) NL7415741A (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4095265A (en) * 1976-06-07 1978-06-13 International Business Machines Corporation Memory control structure for a pipelined mini-processor system
US4302809A (en) * 1978-06-29 1981-11-24 Burroughs Corporation External data store memory device
US4218757A (en) * 1978-06-29 1980-08-19 Burroughs Corporation Device for automatic modification of ROM contents by a system selected variable
US4374411A (en) * 1980-02-14 1983-02-15 Hayes Microcomputer Products, Inc. Relocatable read only memory
JPS5951075B2 (ja) * 1980-03-31 1984-12-12 富士通株式会社 半導体記憶装置
US4415992A (en) * 1981-02-25 1983-11-15 Motorola, Inc. Memory system having memory cells capable of storing more than two states
US4688173A (en) * 1982-04-26 1987-08-18 Sharp Kabushiki Kaisha Program modification system in an electronic cash register
US4488265A (en) * 1982-06-30 1984-12-11 Ibm Corporation Integrated dynamic RAM and ROS
US4523295A (en) * 1982-09-07 1985-06-11 Zenith Electronics Corporation Power loss compensation for programmable memory control system
GB2129585B (en) * 1982-10-29 1986-03-05 Inmos Ltd Memory system including a faulty rom array
GB2136992A (en) * 1983-03-18 1984-09-26 Georg V Coza Method and System of Ensuring Integrity of Data in an Electronic Memory
EP0215992B1 (fr) * 1985-09-24 1991-02-27 International Business Machines Corporation Méthode d'emmagasinage de code de commande d'un processeur en permettant la modification de code et circuit d'adressage pour le faire
US4751703A (en) * 1986-09-16 1988-06-14 International Business Machines Corp. Method for storing the control code of a processor allowing effective code modification and addressing circuit therefor
JP3063006B2 (ja) * 1989-02-08 2000-07-12 インテル・コーポレーション マイクロプログラムされるコンピュータ装置及びマイクロコードシーケンスメモリをアドレツシングする方法
GB2231419B (en) * 1989-05-05 1993-09-22 Technophone Ltd Updating prom information.
KR910005601B1 (ko) * 1989-05-24 1991-07-31 삼성전자주식회사 리던던트 블럭을 가지는 반도체 메모리장치
US5377335A (en) * 1991-08-30 1994-12-27 Unisys Corporation Multiple alternate path pipelined microsequencer and method for controlling a computer
GB2265030A (en) * 1992-03-10 1993-09-15 Trident Trade And Management S Supplementing cd-rom databases.
EP0596144A1 (fr) * 1992-10-07 1994-05-11 International Business Machines Corporation Système de mémoire hiérarchique pour microcode et dispositif de correction d'erreurs dans le microcode
US5581720A (en) * 1994-04-15 1996-12-03 David Sarnoff Research Center, Inc. Apparatus and method for updating information in a microcode instruction
US5742781A (en) * 1996-08-09 1998-04-21 Hitachi America, Ltd. Decoded instruction buffer apparatus and method for reducing power consumption in a digital signal processor
US5717645A (en) * 1997-02-07 1998-02-10 Alliance Semiconductor Corporation Random access memory with fast, compact sensing and selection architecture
GB2330428B (en) * 1997-09-23 2000-05-24 Winbond Electronics Corp Apparatus for repairing faulty program segments in embedded microprocessor systems
CN110944845B (zh) * 2017-07-06 2021-06-15 惠普发展公司,有限责任合伙企业 用于流体喷射设备的存储器的解码器

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3422402A (en) * 1965-12-29 1969-01-14 Ibm Memory systems for using storage devices containing defective bits
US3588830A (en) * 1968-01-17 1971-06-28 Ibm System for using a memory having irremediable bad bits
US3659275A (en) * 1970-06-08 1972-04-25 Cogar Corp Memory correction redundancy system
US3755791A (en) * 1972-06-01 1973-08-28 Ibm Memory system with temporary or permanent substitution of cells for defective cells

Also Published As

Publication number Publication date
NL7415741A (nl) 1975-07-01
DE2461527C3 (de) 1980-07-17
DE2461527B2 (de) 1979-10-31
IT1027017B (it) 1978-11-20
DE2461527A1 (de) 1975-07-10
GB1488271A (en) 1977-10-12
ES433380A1 (es) 1976-11-16
FR2256705A5 (fr) 1975-07-25
US3959783A (en) 1976-05-25

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Legal Events

Date Code Title Description
RE20 Patent expired

Owner name: CIE HONEYWELL BULL

Effective date: 19941223