BE756190A - Circuit integre a haute tension comportant un chenal d'inversion - Google Patents

Circuit integre a haute tension comportant un chenal d'inversion

Info

Publication number
BE756190A
BE756190A BE756190DA BE756190A BE 756190 A BE756190 A BE 756190A BE 756190D A BE756190D A BE 756190DA BE 756190 A BE756190 A BE 756190A
Authority
BE
Belgium
Prior art keywords
integrated circuit
high voltage
circuit including
reverse channel
voltage integrated
Prior art date
Application number
Other languages
English (en)
Inventor
G F Granger
H Khajezadeh
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication date
Publication of BE756190A publication Critical patent/BE756190A/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/085Isolated-integrated
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/145Shaped junctions

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
BE756190D 1969-09-17 Circuit integre a haute tension comportant un chenal d'inversion BE756190A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US85881969A 1969-09-17 1969-09-17

Publications (1)

Publication Number Publication Date
BE756190A true BE756190A (fr) 1971-02-15

Family

ID=25329272

Family Applications (1)

Application Number Title Priority Date Filing Date
BE756190D BE756190A (fr) 1969-09-17 Circuit integre a haute tension comportant un chenal d'inversion

Country Status (9)

Country Link
US (1) US3582727A (fr)
JP (1) JPS4840839B1 (fr)
BE (1) BE756190A (fr)
DE (1) DE2046053B2 (fr)
FR (1) FR2061757B1 (fr)
GB (1) GB1264288A (fr)
MY (1) MY7500042A (fr)
NL (1) NL169803C (fr)
SE (1) SE366873B (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3697828A (en) * 1970-12-03 1972-10-10 Gen Motors Corp Geometry for a pnp silicon transistor with overlay contacts
US4024565A (en) * 1973-10-30 1977-05-17 General Electric Company Deep diode solid state transformer
US3988764A (en) * 1973-10-30 1976-10-26 General Electric Company Deep diode solid state inductor coil
JPS54157092A (en) * 1978-05-31 1979-12-11 Nec Corp Semiconductor integrated circuit device
JPS5834945B2 (ja) * 1980-06-02 1983-07-29 株式会社東芝 ヒユ−ズ形prom半導体装置
US4468686A (en) * 1981-11-13 1984-08-28 Intersil, Inc. Field terminating structure
JPS60247940A (ja) * 1984-05-23 1985-12-07 Hitachi Ltd 半導体装置およびその製造方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA941074A (en) * 1964-04-16 1974-01-29 Northern Electric Company Limited Semiconductor devices with field electrodes
US3370995A (en) * 1965-08-02 1968-02-27 Texas Instruments Inc Method for fabricating electrically isolated semiconductor devices in integrated circuits
US3518506A (en) * 1967-12-06 1970-06-30 Ibm Semiconductor device with contact metallurgy thereon,and method for making same

Also Published As

Publication number Publication date
JPS4840839B1 (fr) 1973-12-03
FR2061757B1 (fr) 1976-08-20
MY7500042A (en) 1975-12-31
NL169803C (nl) 1982-08-16
DE2046053B2 (de) 1979-03-01
DE2046053A1 (de) 1971-03-25
NL169803B (nl) 1982-03-16
FR2061757A1 (fr) 1971-06-25
SE366873B (fr) 1974-05-06
US3582727A (en) 1971-06-01
GB1264288A (fr) 1972-02-16
NL7013677A (fr) 1971-03-19

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