BE750761A - Procede de decapage a l'aide d'un masque evitant le risque de decapage marginal - Google Patents
Procede de decapage a l'aide d'un masque evitant le risque de decapage marginalInfo
- Publication number
- BE750761A BE750761A BE750761DA BE750761A BE 750761 A BE750761 A BE 750761A BE 750761D A BE750761D A BE 750761DA BE 750761 A BE750761 A BE 750761A
- Authority
- BE
- Belgium
- Prior art keywords
- scrapping
- marginal
- risk
- stripping process
- mask
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C15/00—Surface treatment of glass, not in the form of fibres or filaments, by etching
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
- C23F1/00—Etching metallic material by chemical means
- C23F1/02—Local etching
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0035—Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/945—Special, e.g. metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/95—Multilayer mask including nonradiation sensitive layer
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Geochemistry & Mineralogy (AREA)
- Mechanical Engineering (AREA)
- Life Sciences & Earth Sciences (AREA)
- Ceramic Engineering (AREA)
- ing And Chemical Polishing (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Wire Bonding (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL6907831.A NL157662B (nl) | 1969-05-22 | 1969-05-22 | Werkwijze voor het etsen van een oppervlak onder toepassing van een etsmasker, alsmede voorwerpen, verkregen door toepassing van deze werkwijze. |
Publications (1)
Publication Number | Publication Date |
---|---|
BE750761A true BE750761A (fr) | 1970-11-23 |
Family
ID=19806987
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BE750761D BE750761A (fr) | 1969-05-22 | 1970-05-21 | Procede de decapage a l'aide d'un masque evitant le risque de decapage marginal |
Country Status (10)
Country | Link |
---|---|
US (1) | US3721592A (fr) |
JP (1) | JPS4843249B1 (fr) |
AT (1) | AT318004B (fr) |
BE (1) | BE750761A (fr) |
CA (1) | CA933019A (fr) |
CH (1) | CH544159A (fr) |
DE (1) | DE2024608C3 (fr) |
FR (1) | FR2048615A5 (fr) |
GB (1) | GB1311509A (fr) |
NL (1) | NL157662B (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5313177B2 (fr) * | 1973-06-20 | 1978-05-08 | ||
GB1437112A (en) * | 1973-09-07 | 1976-05-26 | Mullard Ltd | Semiconductor device manufacture |
US3955981A (en) * | 1975-01-06 | 1976-05-11 | Zenith Radio Corporation | Method of forming electron-transmissive apertures in a color selection mask by photoetching with two resist layers |
US4111725A (en) * | 1977-05-06 | 1978-09-05 | Bell Telephone Laboratories, Incorporated | Selective lift-off technique for fabricating gaas fets |
JPS54115085A (en) * | 1978-02-28 | 1979-09-07 | Cho Lsi Gijutsu Kenkyu Kumiai | Method of fabricating semiconductor |
US4318759A (en) * | 1980-07-21 | 1982-03-09 | Data General Corporation | Retro-etch process for integrated circuits |
DE3035859A1 (de) * | 1980-09-23 | 1982-05-06 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur aetztechnischen und/oder galvanischen herstellung von ringzonen in engen bohrungen |
EP0092001B1 (fr) * | 1982-04-19 | 1986-10-08 | Lovejoy Industries, Inc. | Procédé pour le façonnage et l'achèvement d'une pièce d'ouvrage |
DE3343704A1 (de) * | 1983-12-02 | 1985-06-13 | Siemens AG, 1000 Berlin und 8000 München | Verfahren und vorrichtung zum aetzen von lochrasterplatten, insbesondere fuer plasma-kathoden-display |
US4631113A (en) * | 1985-12-23 | 1986-12-23 | Signetics Corporation | Method for manufacturing a narrow line of photosensitive material |
US4759821A (en) * | 1986-08-19 | 1988-07-26 | International Business Machines Corporation | Process for preparing a vertically differentiated transistor device |
DE3806287A1 (de) * | 1988-02-27 | 1989-09-07 | Asea Brown Boveri | Aetzverfahren zur strukturierung einer mehrschicht-metallisierung |
FR2683944B1 (fr) * | 1991-11-14 | 1994-02-18 | Sgs Thomson Microelectronics Sa | Procede de gravure d'un sillon profond. |
FR2702306B1 (fr) * | 1993-03-05 | 1995-04-14 | Alcatel Nv | Procédé d'auto-alignement d'un contact métallique sur un substrat de matériau semi-conducteur. |
US6361703B1 (en) * | 1999-03-04 | 2002-03-26 | Caterpillar Inc. | Process for micro-texturing a mold |
TWI234819B (en) * | 2003-05-06 | 2005-06-21 | Walsin Lihwa Corp | Selective etch method for side wall protection and structure formed using the method |
-
1969
- 1969-05-22 NL NL6907831.A patent/NL157662B/xx not_active IP Right Cessation
-
1970
- 1970-05-04 US US00034489A patent/US3721592A/en not_active Expired - Lifetime
- 1970-05-13 CA CA082622A patent/CA933019A/en not_active Expired
- 1970-05-19 GB GB2422270A patent/GB1311509A/en not_active Expired
- 1970-05-19 AT AT444570A patent/AT318004B/de not_active IP Right Cessation
- 1970-05-19 CH CH739970A patent/CH544159A/de not_active IP Right Cessation
- 1970-05-20 DE DE2024608A patent/DE2024608C3/de not_active Expired
- 1970-05-20 JP JP45042811A patent/JPS4843249B1/ja active Pending
- 1970-05-21 FR FR7018478A patent/FR2048615A5/fr not_active Expired
- 1970-05-21 BE BE750761D patent/BE750761A/fr unknown
Also Published As
Publication number | Publication date |
---|---|
DE2024608C3 (de) | 1980-05-29 |
CA933019A (en) | 1973-09-04 |
CH544159A (de) | 1973-11-15 |
DE2024608B2 (de) | 1979-09-06 |
GB1311509A (en) | 1973-03-28 |
DE2024608A1 (de) | 1970-11-26 |
AT318004B (de) | 1974-09-25 |
US3721592A (en) | 1973-03-20 |
JPS4843249B1 (fr) | 1973-12-18 |
NL157662B (nl) | 1978-08-15 |
NL6907831A (fr) | 1970-11-24 |
FR2048615A5 (fr) | 1971-03-19 |
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