BE715997A - - Google Patents
Info
- Publication number
- BE715997A BE715997A BE715997DA BE715997A BE 715997 A BE715997 A BE 715997A BE 715997D A BE715997D A BE 715997DA BE 715997 A BE715997 A BE 715997A
- Authority
- BE
- Belgium
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/57—Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 – G06F7/556 or for performing logical operations
- G06F7/575—Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
- G06F2207/3876—Alternation of true and inverted stages
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Optimization (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL676707613A NL150243B (nl) | 1967-06-01 | 1967-06-01 | Schakeling, opgebouwd uit nand-poorten. |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BE715997A true BE715997A (en:Method) | 1968-12-02 |
Family
ID=19800283
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BE715997D BE715997A (en:Method) | 1967-06-01 | 1968-05-31 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3596075A (en:Method) |
| BE (1) | BE715997A (en:Method) |
| FR (1) | FR1582518A (en:Method) |
| GB (1) | GB1203730A (en:Method) |
| NL (1) | NL150243B (en:Method) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3700868A (en) * | 1970-12-16 | 1972-10-24 | Nasa | Logical function generator |
| USH1970H1 (en) | 1971-07-19 | 2001-06-05 | Texas Instruments Incorporated | Variable function programmed system |
| AU466192B2 (en) * | 1971-07-22 | 1975-10-23 | Tokyo Shibaura Electric Co. Suz | Sequence controller |
| US4037094A (en) * | 1971-08-31 | 1977-07-19 | Texas Instruments Incorporated | Multi-functional arithmetic and logical unit |
| US4503511A (en) * | 1971-08-31 | 1985-03-05 | Texas Instruments Incorporated | Computing system with multifunctional arithmetic logic unit in single integrated circuit |
| US4241413A (en) * | 1978-04-25 | 1980-12-23 | International Computers Limited | Binary adder with shifting function |
| US4254471A (en) * | 1978-04-25 | 1981-03-03 | International Computers Limited | Binary adder circuit |
-
1967
- 1967-06-01 NL NL676707613A patent/NL150243B/xx unknown
-
1968
- 1968-05-29 GB GB25716/68A patent/GB1203730A/en not_active Expired
- 1968-05-31 US US733627A patent/US3596075A/en not_active Expired - Lifetime
- 1968-05-31 BE BE715997D patent/BE715997A/xx unknown
- 1968-06-04 FR FR1582518D patent/FR1582518A/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE1774301A1 (de) | 1971-07-22 |
| NL150243B (nl) | 1976-07-15 |
| GB1203730A (en) | 1970-09-03 |
| FR1582518A (en:Method) | 1969-10-03 |
| US3596075A (en) | 1971-07-27 |
| DE1774301B2 (de) | 1977-02-24 |
| NL6707613A (en:Method) | 1968-12-02 |