Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
  • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
  • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
  • G11B20/10—Digital recording or reproducing
  • G11B20/14—Digital recording or reproducing using self-clocking codes
  • G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
  • G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
  • G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code

Landscapes

• Engineering & Computer Science (AREA)
• Theoretical Computer Science (AREA)
• Signal Processing (AREA)
• Physics & Mathematics (AREA)
• General Engineering & Computer Science (AREA)
• General Physics & Mathematics (AREA)
• Dc Digital Transmission (AREA)
• Pulse Circuits (AREA)
• Synchronisation In Digital Transmission Systems (AREA)

Applications Claiming Priority (1)

Publications (1)

Family

ID=7455885

Family Applications (1)

Country Status (7)

Families Citing this family (3)

Family Cites Families (8)

• 0
  • NL NL231353D patent/NL231353A/xx unknown
  • BE BE571151D patent/BE571151A/xx unknown
• 1957
  • 1957-09-13 DE DEST12952A patent/DE1051328B/de active Pending
• 1958
  • 1958-08-28 US US757767A patent/US3069627A/en not_active Expired - Lifetime
  • 1958-08-29 CH CH6342258A patent/CH364528A/de unknown
  • 1958-09-12 GB GB29259/58A patent/GB857955A/en not_active Expired
  • 1958-09-12 FR FR1212849D patent/FR1212849A/fr not_active Expired

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