AU9243298A - Method for encoding, adding and subtracting figures, and device for realisin g the same - Google Patents

Method for encoding, adding and subtracting figures, and device for realisin g the same

Info

Publication number
AU9243298A
AU9243298A AU92432/98A AU9243298A AU9243298A AU 9243298 A AU9243298 A AU 9243298A AU 92432/98 A AU92432/98 A AU 92432/98A AU 9243298 A AU9243298 A AU 9243298A AU 9243298 A AU9243298 A AU 9243298A
Authority
AU
Australia
Prior art keywords
realisin
subtracting
encoding
figures
same
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU92432/98A
Inventor
Nikolai Dmitrievich Ljubertsy Popov
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
VLADIMIR ANATOLIEVICH LUKASHENKO
Original Assignee
VLADIMIR ANATOLIEVICH LUKASHENKO
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from RU97106137A external-priority patent/RU2101861C1/en
Priority claimed from RU97111415A external-priority patent/RU2109325C1/en
Priority claimed from RU97111416A external-priority patent/RU2109400C1/en
Application filed by VLADIMIR ANATOLIEVICH LUKASHENKO filed Critical VLADIMIR ANATOLIEVICH LUKASHENKO
Publication of AU9243298A publication Critical patent/AU9243298A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/49—Computations with a radix, other than binary, 8, 16 or decimal, e.g. ternary, negative or imaginary radices, mixed radix non-linear PCM

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Nitrogen And Oxygen Or Sulfur-Condensed Heterocyclic Ring Systems (AREA)
AU92432/98A 1997-04-16 1997-12-15 Method for encoding, adding and subtracting figures, and device for realisin g the same Abandoned AU9243298A (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
RU97106137A RU2101861C1 (en) 1997-04-16 1997-04-16 Process of coding of n-digit numbers
RO97106137 1997-04-16
RO97111416 1997-07-09
RU97111415A RU2109325C1 (en) 1997-07-09 1997-07-09 Method and device for adding/subtracting signal-coded numbers
RO97111415 1997-07-09
RU97111416A RU2109400C1 (en) 1997-07-09 1997-07-09 Binary-to-multiple digit code converter (variants)
PCT/RU1997/000405 WO1998047066A1 (en) 1997-04-16 1997-12-15 Method for encoding, adding and subtracting figures, and device for realising the same

Publications (1)

Publication Number Publication Date
AU9243298A true AU9243298A (en) 1998-11-24

Family

ID=27354180

Family Applications (1)

Application Number Title Priority Date Filing Date
AU92432/98A Abandoned AU9243298A (en) 1997-04-16 1997-12-15 Method for encoding, adding and subtracting figures, and device for realisin g the same

Country Status (2)

Country Link
AU (1) AU9243298A (en)
WO (1) WO1998047066A1 (en)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU455339A1 (en) * 1972-06-06 1974-12-30 Предприятие П/Я В-2969 Ternary adder
US4152775A (en) * 1977-07-20 1979-05-01 Intel Corporation Single line propagation adder and method for binary addition
SU1109926A1 (en) * 1983-03-04 1984-08-23 Предприятие П/Я Р-6609 Binary signal-to-quasi-ternary signal converter
US4661801A (en) * 1985-04-01 1987-04-28 General Electric Company Decoder for three level coded data
SU1285602A1 (en) * 1985-04-04 1987-01-23 Предприятие П/Я В-2735 Device for generating blocked balanced ternary code
GB2183971B (en) * 1985-12-05 1989-10-04 Stc Plc Data transmission system
GB8817766D0 (en) * 1988-07-26 1989-07-05 Emi Plc Thorn Signal processing

Also Published As

Publication number Publication date
WO1998047066A1 (en) 1998-10-22

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