AU698665B2 - Linear power amplifying device and method - Google Patents

Description

L.4

AUSTRALA

Patents Act 1990 COMPLETE

SPECIFICATION

STANlDARPD

PATENT

0 0 000000 0 0 0 0 00 0 @0000 0 0 Applicant(s): SAMSUNG ELECTRONICS CO.,

LTD.

invention Title: LINEAR POWER AMPLIFYING DEVICE AND

METHOD

0 0 0~* 00 \0:000: .1 The following statement is a full description of this invention, including the best method of performing it known to me/us: IL t I I 9p, -U i_ i U~I~-~i~*C-UILjT-- U- LINEAR POWER AMPLIFYING DEVICE AND METHOD BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to linear power amplifying device and method and, more particularly, to linear power amplifying device and method for removing intermodulation distortion through predistortion system and feedfordward system.

S: 2. Description of the Related Art 0 In general, high power amplifiers (hereinafter, referred to as HPA) operate in the vicinity of the saturation region having the nonlinear characteristic in order to generate maximum output. However, in the case that a multi-carrier is inputted to the high power amplifier, the multi-carrier generates an intermodulation distortion (hereinafter, referred to as IMD). For this reason, the performance of the above amplifier can be badly deteriorated. Thus, there is generated a problem in that the level of the input signal should be backed off by a number of dB or a power transistor having more capacity than a general transistor should be used to prevent the deterioration of the performance of the above amplifier from being generated.

i iiz In this case, because of using not a large capacity transistor but a proper capacity transistor, the linear power amplifier can eliminate the generated intermodulation distortion by using the linearity. Therefore, the linear power amplifier is necessarily required to improve the quality of an RF signal transmitted from communication apparatuses.

FIG. 1 is a block diagram showing the construction of a prior art linear power amplifier, which is disclosed in the U.S. Patent No. 5, 130,663 allowed to Tattersall and issued on July 14, 1992. Since the linear power amplifier having the same construction as that of FIG. 1 generates a pilot signal, couples 10 the generated signal to an input signal, detects the pilot signal in a final output terminal and controls the phase and the gain of an error amplifier, the intermodulation distortion can be suppressed accordingly. That is, the linear power amplifier utilizes the pilot signal so as continuously suppress the phase and the gain of the error amplifier regardless of variable factors of 15 circumstances, on the purpose of removing the intermodulation distortion.

.i But, now that the linear power amplifier using the pilot signal as illustrated in FIG. 1 has no consideration of the variation factors of circumstances, it is difficult to set the condition for automatically adjusting the linear amplification with the above amplifier. Also, because the linear power amplifier additionally includes a pilot generator and a pilot detect or etc., the construction and the control operation of the linear power amplifier may be sophisticated.

As described above, a predistortion system for generating the predistortion -2i. v ~a 3 in the input signal and improving the intermodulation suppression characteristics of the main amplifier, a negative feedback system for feedbacking the distortion and suppressing the distortion included in the output of the amplifier, and a feedforward system for extracting only the distortion, making the back phase, and suppressing the extracted distortion are exemplary of the linear power amplifying method for eliminating the intermodulation distortion without using the pilot system.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a linear power amplifying device and method for dividing and removing intermodulation distortion with a predistortion system and a feedforward system.

o o a a o In an aspect of the invention, there is provided a linear power amplifier network having a main power amplifier, having: 00o°: an input terminal for receiving an input signal; an output terminal for providing an amplified ;on" output signal; o a predistortion system connected to said input 25 terminal in a first signal path, for initially suppressing a distortion produced by said main power amplifier by distorting the input signal to said main power amplifier to generate a predistortion signal having the input signal included therein representing a distortion substantially complementary to the distortion produced by said main power amplifier, said predistortion system having a power divider for routing the input signal from said input terminal, and automatic level controller for controlling amplitude of said input signal to generate an amplitude controlled signal, a harmonics generator for generating harmonics corresponding to said amplitude controlled signal and a signal coupler for coupling said harmonics with said input H:\Susan\Keep\speci\20148-97-NGM.l.DOC 2 3 /09/98

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TF i9 -k-r i 4 signal to generate said predistortion signal; said main power amplifier connected to said predistortion system in said first signal path, for amplifying the predistortion signal to generate a power amplified signal; a feedforward system connected to said input terminal and said output terminal in a second signal path, for finally suppressing said distortion produced by said main power amplifier by cancelling the input signal and the power amplified signal to generate an error signal representing the distortion produced by said main power amplifier, error amplifying the error signal to generate an amplified error signal, and combining said amplified error signal with said power amplified signal to generate said amplified output signal at said output terminal.

In another aspect of the invention, there is provided a linear power amplifier network, having: an input terminal for receiving an input signal; 20 an output terminal for providing an amplified output signal; a main power amplifier; a predistortion system disposed between said input terminal and said main power amplifier for suppressing distortion produced by said main power amplifier, said predistortion system having a first directional coupler for routing the input signal from said input terminal, an automatic level controller for controlling the amplitude of said input signal to generate an amplitude controlled signal, a harmonics generator, for generating harmonics corresponding to said amplitude controlled signal to generate a harmonic signal, a first variable attenuator for attenuating the harmonic signal to generate an attenuated signal in accordance with a first attenuation control signal, a variable phase shifter for controlling the phase of said attenuated signal to generate a phase shifted signal in accordance with a first phase

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1. UIrr- H:\Suan\Keep\speci\20148-9 7 -NCG I.DOC 23/09/98 hi C -sP I -911 control signal, and a first signal coupler for coupling said phase shifted signal with said input signal to generate a predistortion signal representing a distortion substantially complementary to the distortion produced by said main power amplifier; and a feedforward system disposed between said input terminal and said output terminal for suppressing said distortion produced by said main power amplifier by cancelling the input signal and an output of said main power amplifier to produce an error signal with predetermined amplification representing the distortion produced by said main power amplifier and combining said error signal with the output of said main power amplifier to generate said amplified output signal at said output terminal.

o'.0 In another aspect of the invention, there is o:o provided a linear power amplifier network, having: o an input terminal for receiving an input signal; 0 20 an output terminal for providing an amplified 0" output signal; a main power amplifier; a predistortion system disposed in a first path between said input terminal and said main power amplifier, for initially suppressing distortion produced by said main power amplifier to generate a predistortion signal having said input signal included therein representing a o.o: distortion substantially complementary to the distortion o* produced by said main power amplifier.

a feedforward system disposed in a second path between said main power amplifier and said output terminal, for finally suppressing said distortion produced by said main power amplifier by cancelling the input signal and an output of said main power amplifier to generate an error signal representing the distortion produced by said main power amplifier, and combining said error signal exhibiting Ht\susan\.eei\speci\2014B-97-NGM. .DC 2 3 109/98 N I ie L LQ d 1 D PI IR b~ 5a a predetermined amplification level with said output of said main power amplifier to generate said amplified output signal at said output terminal, said feedforward system comprising; a directional coupler for routing said input signal from said first signal path to said second path; signal canceller means for cancelling said input signal of said second signal path and said output of said main power amplifier to generate said error signal representing the distortion produced by said main power amplifier; an error amplifier for amplifying said error signal with said predetermined amplification level; and a signal coupler for coupling said error signal exhibiting said predetermined amplification level with said output of said main power amplifier in said main signal path so as to generate said amplified output signal at said output oo. terminal free of distortion.

In another aspect of the invention, there is provided a linear power amplifier network, having: a predistortion system positioned at a main path, for determining harmonics corresponding to an input signal, coupling the harmonics with said input signal to generate a 25 predistortion signal; a main power amplifier for amplifying said predistortion signal to generate a power amplified signal; I a first variable attenuator and phase shifter positioned at a sub path, for adjusting the amplitude and phase of said input signal routed from said main path; a first delay for delaying said input signal having the amplitude and phase adjusted from said first variable attenuator and phase shifter for a first predetermined period to produce a first delayed signal; a signal canceller positioned at said sub path, for cancelling the power amplified signal from said main t path and the first delayed signal to extract an error H:\SuBat\Keep\speci\20141-lNCAHMl .DOC 2 3/09/98 r C ~LL- "-LI l~--L1 C I I-I 1 -L~P 8 5b signal representing a distortion contained in said power amplified signal; a second variable attenuator and phase shifter for adjusting the amplitude and phase of said error signal; an error amplifier for amplifying said error signal having the amplitude and phase adjusted from said second variable attenuator and phase shifter to produce an amplified error signal; a second delay for delaying the power amplified signal for a second predetermined period to produce a second delayed signal; and a first signal coupler for coupling said amplified error signal with the second delayed signal to generate a final output signal substantially free from distortion.

In another aspect of the invention, there is provided a linear power amplifier network, having: first means for adjusting amplitude and phase of an input signal in accordance with a first attenuation control signal and a first phase control signal; a predistortion system positioned at a main path, for suppressing a distortion produced by a main power amplifier by distorting the input signal to said main power amplifier to generate a predistortion signal having the input signal included therein representing a distortion substantially complementary to the distortion produced by said main power amplifier; said main power amplifier connected to said predistortion system in said main path, for amplifying the predistortion signal to generate a power amplified signal; a signal canceller positioned at a sub path, for cancelling the power amplified signal from said main path with the input signal to extract an error signal representing a distortion contained in said power amplified signal; second means for adjusting the amplitude and phase of said error signal in accordance with a second H:\Susan\Keep\speci\20148- 9 7lNGM.l.DOC 23/09/98 ~d ~L~mr~-~ts 'Prm 5c attenuation control signal and a second phase control signal; an error amplifier for amplifying said error signal to generate an amplified error signal; a first signal coupler for coupling said amplified error signal with the power amplified signal to generate a final output signal substantially free of distortion; a signal selector for generating a selected signal upon selection between the power amplified signal from said main power amplifier, the error signal from said signal canceller, and said final output signal; a signal detector for synchronizing frequencies of the input signal and the error signal, and detecting a received signal strength indicator; and a controller for controlling said signal selector, said signal detector, and generating said first and second attenuation control signals and said first and o Ssecond phase control signals.

0" In another aspect of the invention, there is provided a method for eliminating an intermodulation S. distortion signal of a linear power amplifier which includes a main power amplifier, including the steps of: firstly suppressing said intermodulation distortion signal generated upon amplification of an input signal in said Smain power amplifier by constantly maintaining said input signal at a predetermined level, generating a harmonics signal corresponding to said input signal, and generating a predistortion signal after coupling said harmonics signal with said input signal; and secondly suppressing said intermodulation SH:\Susan\Keep\speci\20148-97-NGM..DOC 23/09/98 _-7r_ 5d distortion signal by cancelling said input signal and an output of said main power amplifier, extracting sai& intermodulation distortion signal, error-amplifying the extracted intermodulation distortion signal, and coupling the amplified intermodulation distortion signal with the output of said main power amplifier.

In another aspect of the invention, there is provided a linear power amplifying device in a mobile communication system, having: an amplifier for amplifying power of an input signal; a detector for receiving an out ut signal of said amplifier to detect strength of an intermodulation signal contained in the amplified signal; a controller comparing strength of the detected intermodulation signal with strength of a previous intermodulation signal to generate an attenuation and phase control signal; and 20 a predistortor having an intermodulation signal generator and a variable attenuator and phase shifter, wherein said intermodulation signal generator generates S.4 said intermodulation signal according to the level of a transmission signal, and according to a control signal of 25 controller, said variable attenuator and phase shifter controls gain and phase of said predistorted intermodulation signal to apply it to said transmission signal as an opposite phase, thereby applying said Spredistorted intermodulation signal to said amplifier.

In another aspect of the invention, there is provided a linear power amplifying device in a mobile communication system, having: a first variable attenuator and phase shifter for performing gain attenuation and phase control of a transmission signal inputted by a first attenuation and phase control signal; H:\Susan\Keep\speci\20148-97-NGH .l.DOC 23/09,98 Patent Attorney for and on behalf of the Applicant i! 5e an amplifier for amplifying power of output signal of said first variable attenuator and phase shifter; a signal canceller for cancelling a transmission signal applied from said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output signal of said signal canceller according to a second attenuation and phase control signal; an error amplifier for amplifying power of output signal of said second variable attenuator and phase shifter; a signal coupler for coupling output signal of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation ignal of the amplified signal; a controller for generating a selection signal, wherein in case of output of the signal canceller is selected, a present output of the signal canceller is 20 compared with the previous output thereof, thereby generating the first attenuation and phase control sign&l and in case that output of the signal coupler is selected, a present output of a signal coupler is compared with a o0 e previous output thereof, thereby generating the second attenuation and phase control signal; a selector for selecting output of said signal canceller and said signal coupler according to selection signal of the controller; and a detector for detecting strength of a signal 30 outputted from the selector to output it to the controller.

In another aspect of the invention, there is provided a linear power amplifying device in a mobile communication system, having: an amplifier for amplifying power of a transmission signal; 1 a first variable attenuator and phase shifter for Ho\Suan\Keep\speci\20148-97- NM. 1.DOC 23/09/99 5f performing gain attenuation and phase control for a transmission signal inputted by a first attenuation and a phase control signal; a signal canceller for cancelling output of a first variable attenuator and phase shifter from output of said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter for controlling gain attenuation and phase control for output of said canceller according to a second attenuation and phase control signal to generate an error signal; an error amplifier for amplifying output signal of said second variable attenuator and phase shifter; a signal coupler for coupling output of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of canceller is selected, the present output of the canceller is compared with the 20 previous output of the canceller to generate a first S0 attenuation and phase control signal, and in case that Soutput of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase control signal; a selector for selecting output of the signal canceller and the signal coupler according to selection signal of the controller; and a detector for detecting strength of a signal 30 outputted from said selector to apply it to said controller.

In another aspect of the invention, there is provided a linear power amplifying device in a mobile communication system, having: an amplifier for amplifying power of a L. transmission signal; H:\Susan\Keep\speci\20148-97-NG. I.DOC 23/09/98 L--I ~LL~s signal, a harmonics generator for generating harmonics corresponding to said amplitude controlled signal and a signal coupler for coupling said harmonics with said input signal to generate said predistortion signal; /2 5g a first variable attenuator and phase shifter for performing gain attenuation and phase control for output of said amplifier according to a first attenuation and phase control signal; a signal canceller for cancelling a transmission signal applied from said first variable attenuator and phase shifter to detect an intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output of said signal canceller according to a second attenuation and phase control signal to generate an error signal; an error amplifier for amplifying output of a second variable attenuator and phase shifter; a signal coupler for coupling output of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, 20 wherein in case that output of the signal canceller is selected, the prerent output of the signal canceller is compared with the previous output thereof to generate a first attenuation and phase control signal, and in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous o output thereof to generate a second attenuation and phase control signal; a selector for selecting output of the signal canceller and the signal coupler according to selection signal of the controller; and aa detector for detecting strength of a signal :a outputted from said selector to apply it to said controller.

In another aspect of the invention, there is provided a linear power amplifying device in a mobile communication system, having: H:\Susan\Keep\speci\2014697GH. I.DOC 23/09/98 5h a first variable attenuator and phase shifter for performing attenuation and phase control for a transmission signal inputted by a first attenuation and phase control signal; a predistortor having an intermodulation signal generator and a third variable attenuator and phase shifter, wherein said intermodulation signal generator generates a distortion signal according to the level of transmission signal in which a first attenuation and phase control is performed, and a third variable attenuator and phase shifter controls gain and phase of said predistorted intermodulation signal according to a third attenuation and phase control signal of a controller; an amplifier for amplifying power of a transmission signal predistorted; a signal canceller for cancelling a transmission signal applied from said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter S 20 for performing gain attenuation and phase control for output of said signal canceller according to a second attenuation and phase control signal; an error amplifier for amplifying output signal S- of said second variable attenuation and phase shifter; a signal coupler for coupling output of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of the signal canceller is S. selected, the present output of the signal canceller is compared with the previous output thereof to generate a first attenuation and phase control signal, in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase Scontrol signal, and in case that output of the amplifier is SH:\Susan\Keep\speci\20148-97-NM.I.DOC 23/09/98 i.> 5i selected, the present output of the amplifier is compared with the previous output thereof to generate a third attenuation and phase control signal; a selector for selecting output of the signal canceller, the signal coupler and the amplifier according to selection signal of the controller; and a detector for detecting strength of a signal outputted from said selector to apply it to said controller.

In another aspect of the invention, there is provided a linear power amplifying device in a mobile communication system, having: a predistortor having an intermodulation signal generator and a third variable attenuator and phase shifter, wherein said intermodulation signal generator generates a distortion signal according to the level of transmission signal, and said third variable attenuator and phase shifter controls gain and phase of said predistorted intermodulation signal according to the third attenuation o and phase control signal of the controller; tooese San amplifier for amplifying power of the .o predistorted transmission signal; O'i a first variable attenuator and phase shifter for performing gain attenuation and phase control of a :transmission signal inputted by a first attenuation and phase control signal; as signal canceller for cancelling a transmission signal applied from said amplifier to detect an S 30 intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output of said signal canceller according to a second attenuation and phase control signal; an error amplifier for amplifying output signal of said second variable attenuator and phase shifter; a signal coupler for coupling output of said H:\Susan\Keep\speci\20148-97-NGM.I.DOC 23/09/98 /i I above amplifier from being generated.

5j error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of canceller is selected, the present output of the signal canceller is compared with the previous output thereof to generate a first attenuation and phase control signal, in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase control signal, and in case that output of the amplifier is selected, the present output of the amplifier is compared with the previous output thereof to generate the third attenuation and phase control signal; a selector for selecting output of the signal canceller, the signal coupler and the amplifier according to selection signal of the controller; and a detector for detecting strength of a signal 20 outputted from said selector to apply it to said controller.

BRIEF DESCRIPTION OF THE DRAWINGS A more complete appreciation of this invention, and many of S the attendant advantages thereof, will be readily apparent as the same becomes better understood by reference to the following detailed description when considered in conjunction with the accompanying drawings, in which like reference symbols indicate the same or similar components, i. wherein: FIG. 1 is a block diagram showing the construction of a prior art linear power amplifier; FIG. 2 is a block diagram showing the H:\Susan\Keep\peci\20148-97-Nt. I.E11C 23/09/98 I I -a h I -2- 5k construction of a linear power amplifier according to a first embodiment of the present invention; FIG. 3 is a view showing the construction of a predistortor of FIG. 2; FIG. 4 is a view showing the construction of an automatic level controller of FIG. 3; FIG. 5 is a view showing the construction of a signal detector of FIG. 4; FIGs. 6A through 6G are views showing the characteristic of the signal spectrum for explaining the operation of the linear power amplifier according to a first embodiment of the present invention as shown in FIG. 2; FIG. 7 is a view showing the construction of a FIG. 8 is a view showing the construction of a controller of FIG. 2; FIG. 9 is a flow chart showing the operation of 0 a s attenuation and phase o 0 a a o e o e a HI\Susan\Keep\speci\20148-9 7 -NCH. .Doc 23/09/98 I, controlling functions of the controller according t, an embodiment of the present invention; FIG. 10 is a flow chart showing the operation of controlling a variable attenuator and a variable phase shifter of FIG. 2 by the controller according to an embodiment of the present invention; FIGs. 11A through 11C are flow charts showing the characteristic of setting a frequency to control the attenuation and the phase of a signal in FIG.

0 FIG. 12 is a block diagram showing the construction of a linear power i" 10 amplifier according to a second embodiment of the present invention; and, FIG. 13 is a block diagram showing the construction of a linear power amplifier according to a third embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT In the following description, numeral specific details such as components and frequencies of the concrete circuit, are set forth to provide a more through understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these specific details. The detailed description on known function and constructions unnecessarily obscuring the subject matter of the present invention will be avoided in the present invention.

FIG. 2 is a block diagram showing the construction of a linear [power j amplifier according to a first embodiment of the present invention. With respect to FIG. 2, a first variable attenuator 211 controls the attenuation of the gain of -6- ;j 6 controlling tne pnase or said actenua t;u oa i a phase shifted signal in accordance with a first phase H:\Susan\Keep\speci\20148- 97 -NGM. 1.DOC 23/09/98 1 7 the RF signal inputted by an attenuation control signal ATT1. A first variable phase shifter 212 inputs the output of the first variable attenuator 211 and controls the phase of the RF signal inputted by a phase control signal PCI1.

A predistortor 213 inputs the RF signal, previously expects a harmonics as the intermodulation distortion to be generated in a main power amplifier 214 of a final terminal and generates the distortion signal. The main power amplifier 214 power amplifies the RF signal outputted in the predistortor 213 and outputs the power-amplified signal. A second delay unit 215 inputs the RF signal outputted in the main power amplifier 214, delays and outputs the inputted RF i i 10 signal during the time when the intermodulation signal is applied. The construction as mentioned hereinbefore is considered as the main path of the linear power amplifier according to a preferred embodiment of the present invention.

j A power divider 216 divides the RF signal inputted to the main path and outputs the divided RF signal. Also, it is possible to use a directional coupler as the power divider 216. A first delay 217 compensates the delay time of the RF signal in the predistortion and amplification process of the main path. A power i divider 218 is positioned at an output terminal of the main power amplifier 214 and divides the output of the main power amplifie' 21 I ihen to be outputted.

Like the power divider 216, the directional coupler .an be used as the power divider 218,. A signal canceler 219 inputs the RF signal outputted in the first delay 217 and the amplified RF signal outputted in the power amplifier 214. The signal canceler 219 cancels the RF signal outputted by the first delay 217 from the output of the main power amplifier 214, thereby detecting the -7-

I

intermodulation signal. In the embodiment of the present invention, the signal canceler 219 is embodied as the subtractor.

ti A second variable attenuator 220 inputs the intermodulation signal outputted from the signal canceler 219 and controls the gain of the intermodulation signal inputted by an attenuation control signal ATT2 outputted in a controller 237. A second variable phase shifter 221 inputs the intermodulation signal outputted in the second variable attenuator 220 and controls the phase of the intermodulation signal inputted by a phase control :o signal PIC2 outputted in the controller 237. An error amplifier 222 amplifies the S 10 intermodulation signal outputted in the second variable phase shifter 221 and outputs the amplified intermodulation signal. A signal coupler 223 couples the output of the error amplifier 222 to the output terminal of the second delay 215.

The directional coupler can be used as the signal coupler 223.

S: The construction as stated above corresponds to the sub-path for suppressing the intermodulation signal of the main path in the preferred embodiment of the present invention.

A power divider 231 divides the inputted RF signal positioned at the input terminal and outputs a first signal SF1. A power divider 232 is disposed at the output terminal of the main power amplifier 214, divides the amplified RF signal and outputs a second signal SF2. A power divider 233 is positioned to the output of the signal canceler 219, divides the intermodulation signal where the RF signal is canceled, and outputs a third signal SF3. A power divider 234 is provided to the output terminal, divides the finally outputted RF signal, and -8path and the first delayed signal to extract an error S t I H;\Susan\Keep\speci\20148-97-NGM.1.DOC 23/09/98 9. outputs a fourth signal SF4. The power dividers 231 to 234 can be replaced with the directional coupler. A signal selector 235 inputs the above signals SF1 to SF4 outputted in the power dividers 231 to 234 and selectively outputs the signal SF which is correspondingly controlled by a switching control data SWC outputted in the controller 237.

A signal detector 236 detects a received signal strength indicator (hereinafter, referred to as RSSI) of the signal SF outputted in the signal selector 235 by the control data PCD (PLL control data) which is outputted in the :icontroller 237 and then outputs an RSSI signal which is converted into the direct 10 current. The controller 237 generates the switching control signal SWC for selection of the signal SF pertaining to the signal selector 235 and thus, the control data PCD for determining the frequency for detection of the RSSI of the signal SF selected in the signal detector 236.

Additionally, the controller 237 analyzes the value of the RSSI signal outputted in the signal detector 236 and generates the attenuation control signals ATT1 to ATT3 and the phase control signals PIC1 to PIC3, the above signals controlling the variable attenuator and the variable phase shift in order to adjust the gain and the phase of the signal SF corresponding to the analyzed result of the controller 237. Most of all, in the case that the input signal outputted in the power divider 231 is selected, the controller 237 controls the signal detector 236, detects the RSSIs of the inputted RF signal, and judges the size of the RSSIs, so that the frequency component of the inputted RF signal can be recognized, accordingly. In the case that the output of the main power amplifier 214 outputted in the power divider 232 is selected, the controller 237 controls the -9- 9 phase of said error signal in accordance with a second ^i H:\Susan\Keep\speci\20148- 9 7-NGM.l.DOC 23/09/98 i t/ signal detector 236, detects the RSSIs of the harmonics signal of the amplified RF signal, and judges the size of the RSSIs, thereby generating an attenuation control signal ATT3 and a phase control signal PIC3, each signal for adjusting the attenuation and the phase of the intermodulation signal outputted in the predistortor 213. Secondly, when the output of the signal canceler 219 is selected, the controller 237 controls the signal detector 236, detects the RSSIs of the RF signal contained in the canceled intermodulation signal, and judges the size of the RSSIs, thereby generating the attenuation control signal ATT1 and the phase control signal PIC1, each signal for adjusting the attenuation and the phase oo 10 of the RF signal inputted in the input terminal of the linear power amplifier.

e Thirdly, when the amplification signal finally outputted is selected, the controller 237 controls the signal detector 236, detects the RSSIs of the intermodulation signals included in the signal finally outputted, and judges the size of the RSSIs, 1thereby generating the attenuation control signal ATT2 and the phase control signal PIC2, each signal for adjusting the attenuation and the phase of the intermodulation signal outputted in the signal canceler 219.

According to a preferred embodiment of the present invention as constructed above, the linear power amplifier eliminates the intermodulation signal which can occur in the amplification step by using the predistortion system and the feedforward system. In the above embodiment of the present invention, the predistortor 213 firstly performs the function of removing the intermodulation signal which is outputted to the main power amplifier 214. In order to operate the above function, the preamplifier 213 previously expects the harmonics which can be generated upon amplification in the main power amplifier 214 to be generated, to then adjust the phase thereof so as to have the back phase with the 1. secondly suppressing said intermodulation SH,\Susan\Keep\speci\20148-97NGM .I.DOC 23/09/98 harmonics capable of being generated in the main power amplifier 214, to thereby be outputted, at the time when the harmonics is applied to the power transistor of the main power amplifier 214.

In the event of using the predistortion system, it is impossible to completely eliminate the intermodulation signal caused in the linear power amplifier. As a result, the linear power amplifier according to the embodiment of the present invention, firstly suppresses the intermodulation signal in the predistortor 213, and finally suppress the intermodulation signal with adapting the feedforward system. The linear power amplifier using the feedforward 10 system, cancels pure Rf signal distortion in the output of the main power amplifier 214, extracts the intermodulation signal, and couples the extracted intermodulation signal to the signal coupler 223, thereby canceling the intermodulation distortion. Therefore, when using the feedforward system, the intermodulation signal distortion contained in the signal amplified in the finally- 15 outputted terminal of the linear power amplifier can be suppressed, so that the 0 pure amplified RF signal can be outputted.

In th, odiment of the present invention as explained before, the intermodulation signal generated in the amplification of the main power amplifier 1 214 is firstly suppressed with using the predistortion system, and the intermodulation signal pertaining to the output of the main power amplifier 214 is secondly suppressed using the feedforward system. Herein, for the convenience of explanation, after the operation for suppressing the intermodulation signal by the predistortion system may be observed, it is intended that the observation on the operation for suppressing the intermodulation 11 ~IJ r.~i transmission signal inputted by a first attenuau.u cum phase control signal; H:\Susan\Keep\speci\ 2 0148-9 7 -NGM. .DOC 23/09/98 I signal by the feedforward system may be followed.

i .4' FIGs. 6A through 6G are views showing the characteristic of the sigr., spectrum for explaining the operation of the linear power amplifier according to a first embodiment of the present invention as shown in FIG. 2, wherein FIGs.

6A to 6G are illustrated through the assumption of two tones. That is, FIG. 6A is indicated as the signal RF inputted, FIG. 6B is indicated as the harmonics signal fo the RF signal generated in a harmonic generator 314, FIG. 6C is indicated as a signal which can adjust the size of the harmonics by a variable attenuator 315 in the predistortor 213 and have the adjusted phase capable of being inputted with back phase of the main power amplifier 214 by means of a variable phase shift 316, and FIG. 6D is indicated as the amplified RF signal containing the intermodulation signal by amplifying the predistortion signal inputted in the main power amplifier 214 as shown in FIG. 6C. Also, FIG. 6E is indicated as the intermodulation signal extracted by canceling the signal distortion in the amplification signal RF in the signal canceler 219 as shown in FIG. 6A, FIG. 6F is indicated as the signal which adjusts the size of the intermodulation signal as shown in FIG. 6E and adjusts by back phase with the output of the main power amplifier 215 as shown in 6D, and FIG. 60 is indicated as a finally-outputted signal which suppresses the intermodulation signal by coupling the intermodulation signal extracted as shown in FIG. 6D and the RF signal amplified as shown in FIG. 6D, to each other with their back phase.

FIG. 3 is a view showing the construction of the predistortor 213 of FIG.

2. With reference to FIG. 3, the power divider 312 divides the RF signal positioned in the input terminal and outputs the divided Rf signal. An automatic 12- U,'3TEI! T.C di LLm.B Ui t yi 1 aCL..L a first variable attenuator and phase shifter for H:\Susan\Keep\speci\2014 8 97 -NGM.1 DOC 23/09/98 ~11*1~ level controller (hereinafter, referred to as ALC) constantly maintains the level of the RF signal inputted in order to generate the constant harmonics regardless of the variation of the level of the RF signal inputted. The harmonics generator 314 inputs the RF signal which adjust the level thereof in the automatic level controller 313 and generates third, fifth, seventh, and high harmonics of the RF signal. A variable attenuator 315 inputs the harmonics signal outputted in the harmonics generator 314 and controls the gain of the harmonics distortion by the attenuation control signal ATT3 outputted in the controller 237. The variable phase shifter 316 inputs the harmonics signal outputted in the harmonics 0 6o 10 distortion by the phase control signal PIC3 outputted in the controller 237. A second delay 311 delays the RF signal inputted through the main path during the period of time when the predistortion signal occurs. A signal coupler 317 is positioned between the output terminal of the second delay 311 and the input terminal of the main power amplifier 214, thereby coupling the predistortion S" 15 signal to the delayed RF signal.

Referring to FIG. 3, the harmonics generator 314 is constructed with a signal coupler and a shottkey diode. Then, upon the RF signal is inputted to the shottkey diode, the shottkey diode generates the high harmonics in accordance with the level of the inputted RF signal. Consequently, the level of the RF signal inputted to the shottkey diode should be set as the IP'-el capable of most desirably Ssuppressing the intermodulation signal included in the output of the main power amplifier 214. To meet it, the automatic level controller 313 is positioned in the front terminal of the harmonics generator 314 so th-t the RF signal can always be inputted with the given level.

13 1- JU- amp.lrylJymg pOWe~r uL ca -T transmission signal; H:\Susan\Keep\speci\2014 g-97-NGM.l.DOC 23/09/98

/A

The automatic level controller 313 controls and outputs the RF signal of the given level set regardless of the variation of the level of the Rf signal inputted to the linear power amplifier. FIG. 4 is a view showing the construction of the automatic level controller 313 of FIG. 3, where a variable attenuator 412 is connected between the power divider 312 and the harmonic generator 314. So then, the power divider 414 is disposed at the input terminal of the harmonics generator 314, which conclusively divides and outputs the RF signal having the adjusted level and being applied to the harmonic generator 314. In this case, a power detector 415 converts the RF signal into the DC voltage and thus outputs the converted signal to a level controller 416. Thus, the level controller 416 controls the variable attenuator 412 according to the DC voltage outputted to the 'o power detector 415, so that the RF signal having always the given level, can be inputted to the harmonics generator 314.

Herein, the power detector 415 of FIG. 4 should sense the multi-carrier.

15 Namely, the power detector 415 should input the RF signal for the multi-carrier and converts the inputted RF signal into the DC voltage. FIG. 5 is a view showing the construction of the power detector 415 of FIG. 4, where an RF transformer 451 inputs the RF signal and generates two signals having the phase difference of 1800 with each other, the two signals outputted from the RF transformer 451 are converted from transmitting lines 452 and 453 through the shottkey diodes 454 and 455 into the DC level, thereby synthetically filtering the converted signal through a capacitor 456 and a resistor 457, and outputting the filtered signal as the DC voltage.

With reference to FIGs. 3 and 4, regarding the operation for controlling 14communication system, having: -i V H \Susan\Keep\speci\20148-9 7 -NGM.1.DOC 23/09/98 the level of the inputted Rf signal, the RF transformer 451 for generating the signals of the phase difference of 1800 of the power detector 415 generates two signal by separating the inputted RF signal by a unit of a semi-diameter.

Further, the shottkey diodes 454 and 455 convert the two signals inputted via the transmitting lines 452 and 453 into the DC level, respectively. Accordingly, the average power of the multi-carrier can be sensed without error, so that the level of the RF signal inputted to the harmonics generator 314 can exactly be converted into the DC voltage.

o a At this point, the level controller 416 generates the control signal 10 depending on the level of the DC voltage of the RF signal outputted from the S" power detector 415 and applies the generated control signal to the variable attenuator 412. The level controller 314 can be embodied using an OP amplifier.

At this time, the control signal outputted in the level controller 416 is generated to enable the attenuation control to be performed more upon the voltage is S 15 increased in accordance with the DC voltage of the detected RF signal and enable the attenuation control to be performed less upon the voltage is decreased therein. Thus, the variable attenuator 412 variably attenuates the RF signal to have its given level regardless of the level of the inputted RF signal and inputs the attenuated signal to the harmonics generator 314.

Yt Then, when the variation of the level of the inputted RF signal is the operation area of the automatic level controller 313 should be designed to control its level above the 10db, minimumly. In addition, the output level of the RF signal of the automatic level controller 313 should be set to optimumly suppress the intermodulation signal which the harmonic generator 314 generates 15 control signal, and in case that output of the amplifier is in the main power amplifier 214, as the predistortion signal. Therefore, since the harmonic generator 314 which inputs the output of the automatic level controller It 313, inputs the RF signal of the given level, the harmonics can stably occur. As i well, inasmuch as the harmonics outputted in the harmonics generator 314 is i 5 inputted to the main power amplifier 214 coupled with the RF signal, the main power amplifier 214 can prevent the generation of the intermodulation signal in steps of amplifying the RF signal.

S" Likewise, upon inputting the harmonics generated as above, to the main I power amplifier 214, the size and the back phase of the harmonics capable of 10 being generated in the amplification should be adjusted. The variable attenuator S315 and the variable phase shifter 315 as show n in FIG. 3, adjust the size of the harmonics generated as the size of the inrmodulation signal capable of being generated in the amplification and the phase to input the harmonics having the adjusted size with back phase.

The controller 237 controls the signal selector 235 and selects the output 5 in d of the main power amplifier 214 which is outputted in the power divider 232, and the signa detector 236 detects the RSSI of the intermodulation signal in the output of the main power amplifier 214 as shown in FIG. 6D. After comparing s and analyzing the RSSI value of the intermodulation signal outputted in the signal detector 236 with the RSSI value of the previous state, the attenuation control signal ATF3 and the phase control signal PIC3 are generated so as to control the power amplifier 214.

-16- -16a signal coupler for coupling output of said S' H:\Susan\Keep\speci\2014B-97-NGM.I .DOC 23109/98 Then, the variable attenuator 315 adjusts the size of the predistortion signal generated in the harmonics generator 315 by the attenuation control signal ATT3, and the variable phase shifter 315 adjusts its phase so that the predistortion signal can be inputted with back phase to the main power amplifier 214. As adjusted above, the harmonics signal as shown in FIG. 6D which is generated in the harmonics generator 314, adjusts its size and phase, and the signal coupler 317 couples the intermodulation signal to the input terminal of the main power amplifier 214. At this moment, as shown in FIG. 6A, the second delay 311 for delaying the inputted RF signal, delays the RF signal till the 10 predistortion signal is coupled to the input terminal of the main power amplifier S 214. Thereafter, it is understood that the predistortion signal is coupled to the input terminal of the main power amplifier 214. Here, it is preferal to use the '....position where the intermodulation signal coupled to the RF signal as shown in FIG. 6C is adjusted with the back phase, as the input terminal of the power 1 transistor of the main power amplifier 214.

As noted above, the predistortor 213 beforehand expects the 0 intermodulation signal to be generated in the main ower amplifier 214 to thereby generate the predistortion signal, and controls the phase and attenuation of the harmonics to prevent the intermodulation signal from being generated at a maximum value, thereby inputting the controlled attenuation and phase to the main power amplifier 214. In this event, the predistortor 213 mainly eliminates the third harmonics generated with highest level among the harmonics capable of being generated in the main power amplifier 214. The intermodulation signal elimination effect of the predistortion system can greatly reduce the load of intermodulating the signal by adapting the feedforward system. Inasmuch as the intermodulating the signal by adapting the feedforward system. Inasmuch as the 17- _-e FIG. 2 is a block diagram showing the H:\Susan\Keep\speci\20148-97-NG. .DOC 23/09/98 adjustment of the feedforward system is very fine and different, the predistortion system is advantageous in consideration of the improvement of a number of dB.

Secondly, after firstly suppressing the intermodulation signal which is generated in the main power amplifier 214 by the predistortion system as mentioned previously, the intermodulation signal which is impossible to be suppressed is secondly suppressed by the feedforward system. In above the feedforward system, the steps for reducing the intermodulation signal of the main power amplifier 214 are largely divided into two steps. The one is to extract the pure intermodulation signal distortion by canceling the inputted RF signal and 10 output of the main power amplifier 214. The other is to cancel the intermodulation sign.,i distortion in the output of the main power amplifier 214 after correcting the size and the phase of the extracted intermodulation signal, so as to reduce the intermodulation signal included in the signal which is finally outputted in the main power amplifier in a perfect manner.

S.o Most of all, the explanation on the first step of the feedforward system will be given hereinafter. The power divider 216 on the sub path divides the RF signal inputted as shown in FIG. 6A in the sub-path, and the first delay unit 217 delays the RF signal divided in the power divider 216 during the time of the predistortion and RF amplification, thereby applying the delayed signal to the signal canceler 219. Thus, the RF signal distortion as shown in FIG. 6A which is outputted from the first delay 217 is reciprocally canceled with the RF signal distortion of the amplification signal as shown in FIG. 6D which is divided in the power divider 218, so as to extract and output the pure intermodulation signal distortion.

-18 L H:\Susan\Keep\speci\20148-97-NH.l DOC 23/09/98 ~t C1--s~-9 9C~rL- j As mentioned hereinbefore, the signal canceler 219 as the core construction of the feedforward system, is to detect only the intermodulation signal distortion in the main power amplifier 214. The signal canceler 219 can be constructed as a subtractor or an adder. In the case of constructing the signal canceler 219 as the subtractor, two RF signals to be inputted should be adjusted to have the same phase with each other. Also, in the case of constructing the signal canceler 219 as the adder, the two RF signals to be inputted should be adjusted to have the back phase with each other. In a preferred embodiment of °*the present invention, the signal canceler 219 is embodied as not the subtractor, 10 but the adder. In this case, the subtractor has a signal coupler in an interior o a thereof, inputs one signal of two RF signals to be inputted to the signal coupler while having the same phase with the other signal, and converts the other signal thereof to have the back phase with the one signal, thereby inputting the converted signal to the signal coupler. When the RF signal as illustrated in FIG.

6A and the RF signal amplified as illustrated in FIG. 6D are inputted to the signal canceler 219 embodied as the subtractor, the two RF signals distortion having their phases equal to each other, is converted to have their back phases with each other in an interior thereof. After that, the RF signal is canceled while passing the signal coupler (herein, the Wilkinson combiner can be used), thereby purely remaining the intermodulation signal distortion.

At this point, each of levels and phases of two RF signals inputted to the signal canceler 219 can be exactly equal to each other. To meet it, the amplified RF signal outputted in the main power amplifier 214 of the main path and the RF signal to be inputted via the sub-path should be precisely accorded with the group delay as well as the characteristic of the flatness of the delay should be -19- .1 -6e~lllrrab~s~ar 1 positive. That is, it is preferable that the phase distortion of the RF signal desirable to be canceled should be maximumly prevented from being generated.

As described above, when the level and the phase of the RF signal outputted in the first delay 217 and the output of the main power amplifier 214 are not exactly accorded with each other, the RF signal is not precisely canceled in the signal canceler 219. To remove the foregoing, the first variable attenuator 211 of FIG. 2 adjusts the level of the RF signal inputted by the attenuation control signal ATT1 outputted in the controller 237 and the second variable phase shifter 212 adjusts the phase of the RF signal inputted by the phase control 10 signal PIC1 which is outputted in the controller 237. Accordingly, the first S"variable attenuator 211 and the second variable phase shifter 212 respectively, adjusts to accord the phase and the level of the RF signal of the sub path with those of the RF signal of the main path. Thus, the signal canceler 219 cancels two RF signal inputted while having the same level and phase with each other.

o• •m As mentioned previously, for the sake of controlling the phases and the levels of two RF signals, the controller 237 outputs the switch control signal oeooc SWC for selection of a third signal SF3, to the signal selector 235 and outputs the control data PCD for detection of the RSSI of the RF signal distortion of the third signal SF3 in the signal detector 236. As a consequence, the signal selector 235 selectively inputs the third signal SF3 as the output of the signal canceler 219, the output of the signal selector 219 being divided in the power divider 233, and the signal detector 236 generates the RSSI which converts the RF signal distortion of the third signal SF3 into the DC voltage. Then, the controller 237 generates the attenuation control signal ATT 1 and the phase control signal PIC 1 -7for attenuation of the RF signal distortion in the signal canceler 219.

And then, the first variable attenuator 211 attenuates the RF signal inputted by determining the attenuation ratio by way of the attenuation control signal ATTI, and the first phase variable phase shifter 212 adjusts the phase of the RF signal inputted by the phase control signal PIC1. Here, since the attenuation control signal ATT and the phase control signal PIC1 are generated after comparing and analyzing the RSSI of the RF signal to be outputted in the signal canceler 219 and the RSSI of the previous RSSI with each other, the first variable attenuator 211 and the first variable phase shifter 212 controls two RF 10 signals as shown in FIGs. 6D and 6A so that the above RF signals can have the same phases and the levels with each other, finally.

The reason for canceling the RF signal distortion in the signal canceler 219 as stated before, is to have no influence on the error amplifier 222 positioned in the back terminal by greatly suppressing the RF signal and solely extracting the intermodulation signal distortion. Namely, if the output of the signal canceler 219 is changed and the RF signal is not effectively eliminated, the RF signal having the relatatively large level is inputted to the error amplifier 222, thereby having the damage on the error amplifier 222.

Secondly, the explanation on the second step of the feedforward system will be given hereinafter. Therein, the intermodulation signal outputted in the signal canceler 219 as above adjusts its phase and level through the second variable attenuator 220, the second variable phase shifter 221, and the error amplifier 222, and the intermodulation signal distortion included in the output of -21 I h i A.W Ii 8 i i I i- the main power amplifier is removed by inputting the adjusted signal to the main path. At this time, the intermodulation signal coupled by a signal coupler 223 should have the back phase of the amplified and outputted signal.

Here, the controller 237 generates the switch contrul signal SWC for selecting the fourth signal SF4 as the finally-outputted signal which is divided in a power divider 234 and outputs the control data PCD for detection of the RSSI of the harmonics as the intermodulation signal of the fourth signal SF4. Thus, the signal selector 235 selectively outputs the fourth signal SF4 outputted in the power divider 234 by the switch control signal SWC and the signal detector 236 10 is applied to the controller 237 with detecting the RSSI of the harmonics of the Sfourth signal SF4 by the control data PCD. So then, the controller 237 compares and analyses the RSSI of the intermodulation signal included in the finallyoutputted signal with the RSSI of the previous intermodulation signal, so that the attenuation control signal ATT2 and the phase control signal PIC2 for 15 suppression of the intermodulation signal included in the finally-outputted signal can be generated depending on the analyzed result.

Therefore, the second variable attenuator 220 for inputting the output of the signal canceler 219 adjusts the level of the intermodulation signal inputted by the attenuation control signal ATT2, and the second variable phase shifter 221 for inputting the signal outputted from the second variable attenuator 220 adjusts the phase of the intermodulation signal which is inputted by the phase control signal PIC2. At this moment, the second variable phase shifter 221 controls the iphase of the intermodulation signal to have the back phase of the signal coupler 223 by means of the p:hase control signal PIC2. Thus, the error amplifier 222 -22- -9- I I connected between the second variable phase shifter 221 and the signal coupler 223 amplifies and outputs the intermodulation signal which has the level and the phase adjusted as above.

As discussed above, the linear power amplifier according to an embodiment of the present invention, uses the feedforward system and the predistortion system in order to suppress the intermodulation signal belonging to the amplification signal. For the sake of suppressing the intermodulation signal, the intermodulation signal capable of being generated in the main power 0. amplifier 214 is beforehand suppressed by the predistortion system and thus the 10 intermodulation signal included in the output of the main power amplifier 214 is detected by the feedforward system, thereby coupling the above detected signal to the finally-outputted signal and reducing the intermodulation signal in a sequential manner. In the case of eliminating the intermodulation signal with only using the feedforward system, because it is difficult to design and construct the 15 main power amplifier 214 and the error amplifier 222, the intermodulation signal of the given size is previously suppressed by using the predistortor 213 and the S° rest of the intermodulation signals is eliminated by the feedforward system. Due to that, the design and construction of the linear power amplifier can be facilitated.

Next, the steps of suppressing the intermodulation signal by using the feedforward system and the predistortion system centering on the controller 237 will concretely be described in the following description.

FIG. 7 is a view showing the construction of the signal detector 236 of -23 1~ I PPn~P~e~lC- ~~r17~~ IC~ ~p~rB---~SRIICYL- r-ar ll~r~lulr~l P 3 e~ FIG. 2 according to the present invention.

With regard to FIG. 7, an attenuator 711 attenuates and outputs an SF signal outputted from the signal selector 235. A filter 712 as a wideband filter, filters the signal of the transmitting band. A phase lock loop (hereinafter, referred to as PLL) 713 and an oscillator 714 generate a corresponding local frequency LF1 by the control data PCD outputted in the controller 237. The above local frequency LF1 is to determine the frequency for detecting the RSSI of the selected SF signal. A mixer 715 mixes the signal outputted in the filter 712 with the local frequency LF1 and thus generates an intermediate frequency 10 IF. A filter 716 as an intermediate frequency filter, filters a subtraction signal SF-LF1 of two frequencies in the output of the mixer 715, thereby generating the filtered signal as an intermediate frequency LF1. An oscillator 719 generates 0 the fixed local frequency LF2. The mixer 718 mixes the intermediate frequency LFI outputted in the intermediate frequency amplifier 717 and the intermediate 15 frequency IF2 to then generate the intermediate frequency IF2. A filter 720 filters a subtraction signal IF1-LF2 of two frequencies in the output of the mixer S' 718 and outputs the filtered signal as the local frequency LF2. A log amplifier 712 converts the intermediate frequency IF2 to be outputted in the filter 720 into the DC voltage and generates the converted voltage as the RSSI signal.

When observing the operation of FIG. 7, the signal selector 235 selectively outputs the corresponding RF signal among the first signal SF1 to the fourth signal SF4 by the switch control signal SWC of the controller 237. Thus, the filter 712 of the signal detector 236 filters the RF signal and applies the filtered signal RF to the mixer 715. And then, the PLL 713 and the oscillator -24nh 11 714 generate the local frequency LF1 for selection of the RF signal or the harmonics of the signal selected by the control data PCD 1 of the controller 237.

Consequently, the mixer 715 mixedly outputs the SF signals and the local frequency LF1 and the filter 716 filters the frequency corresponding to the subtraction between two signals and outputs the filtered frequency as the intermediate frequency IF1. The construction as described above determines the frequency for detection of the RSSI in the selected SF signal and performs the frequency down conversion of the first step, at the same time.

Hereinafter, the mixer 118 mixes the local frequency LF2 and the 10 intermediate frequency IF 1 outputted in the oscillator 718 and the filter 720 filter the frequency corresponding to the subtraction between the int, liate frequency IF1 and the local frequency LF2 of the mixed signals, thereby outputting the filtered frequency as the intermediate frequency IF2. The frequency down conversion of the second step is performed via the above construction. The logic amplifier 721 inputs the intermediate frequency IF2, converts the inputted intermediate frequency IF2 into the DC voltage to be outputted. Herein the outputted signal becomes the RSSI.

FIG. 8 is a view showing the construction of the controller 237 of FIG.

2 according to the present invention. In FIG. 8, an analog to digital converter 814 (hereinafter, referred to as ADC) converts the RSSI outputte 'n the signal selector 236 into the digital data so as to be outputted. A read only memory 812 (hereinafter, referred as to ROM) stores the program for controlling the attenuation and the phase in accordance with an embodiment of the present invention. A central processing unit 811 (hereinafter, referred to as CPU) I-~e h~ L Ia 12generates the control data PCD for selection of the frequency to select the desired RSSI in the selected SF signal and the switch control signal SWC for selection of the RF signal depending on the program of the ROM 812, and generates the attenuation control signals ATT and the phase control signals PIC after comparing and analyzing the RSSI outputted in the ADC 814 with each other. A random access memory 813 (hereinafter, referred to as RAM) temporarily stores all kinds of data which are generated in the process of performing the program. A digital to analog converter 815 (hereinafter, refereed to as DAC) converts the attenuation control data and the phase control data outputted in the controller 811 into analog data and outputs the converted data as the attenuation control signals ATT and the phase control signals PIC. A communicator 816 communicates state information of the linear power amplifier under the control of the CPU 816.

FIG. 9 is a flow chart showing the operation of adjusting the level and the 15 phase with controlling the above variable attenuators and the variable phase shifters by the controller 237 according to an embodiment of the present invention. As shown in FIG. 9, axis indicates an attenuation value and "Y" axis indicates a phase variation values. With reference to FIG. 9, upon changing the value of the variable attenuator from Pa to Pb at the point when the RSSI is inputted, if the size of the detected signal is decreased, the phase variation value is changed from Pb to Pc. After that, in the event that the value of the variable attenuator is changed from Pc to Pd at the point when tne RSSI is inputted, if the detected signal is again increased, the phase variation value is changed in the direction of Pc. Herein, Pc is indicated as the point when the size of the attenuation value is temporary. Accordingly, upon the phase variation value is -26- 13 '27 changed from Pc to Pe and the size of the detected RSSI is decreased, the variable phase shifter moves the phase variation value in the direction of Pf.

When attenuation and phase operations are repeatedly controlled as stated above, there can be found the value of the variable attenuator and the variable phase shifter which the size of the detected SF signal is minimized. FIG. 10 is a flow chart showing the operations of the variable attenuator and the variable phase shifter of the controller 237 according to an embodiment of the present invention. As set forth in FIG. 10, after firstly controlling the phase of the detected signal, the function of attenuating the signal is performed. However, it is possible to control the phase of the signal after attenuation of the signal.

Referring to FIG. 10, the steps for eliminating the intermodulation distortion are greatly divided into 4. Regarding this, most of all, the RSSI of the first signal SF1 is detected, a channel where the RF signal is detected in the \o transmitting band is set, thereby determining service channels. Secondly, the RSSI of the second signal SF2 is detected and the main power amplifier 214 suppresses the intermodulation signal to amplify the received RF signal, thereby generating the predistortion signal. Thirdly, the RSSI of the third signal SF3 is detected and thus, the intermodulation signal of canceling the RF signal distortion in the signal canceler 219 is detected. Fourthly, the RSSI of the fourth signal SF4 is detected and the intermodulation signal included in the finallyoutputted signal which is outputted in the main power amplifier 214 on the main path can be controlled to be suppressed.

FIGs. 11A through 11C are flow charts showing the characteristic of -27- 14setting a frequency to control the attenuation and the phase of a signal in FIG.

wherein FIG. 1 lA is represented as the second signal SF2 as the output of the main power amplifier 214, output being divided in the signal coupler 232, FIG. 11B is represented as the third signal SF3 as the output divided in the signal coupler 232, and FIG. 11C is represented as the fourth signal SF4 as the finally-outputted signal in the signal coupler 224.

With reference to FIGs. 10 and 11, upon first driving, the controller 237 performs initialization operation of the linear power amplifier in the step 1000.

Upon initialization, the CPU 811 read: the voltage values of the attenuation C 10 control signals ATT1 to ATT3 and the phase control signals PIC1 to PIC3 with C -C the specific power and the specific frequency, stores the read voltage values in the corresponding area of the RAM 813, and initializes the corresponding areas of the RAM 813 for storing the RSSI value corresponding the number of the transmitting channels and the service channel information. The initialization 15 operation as above is performed only upon the linear power amplifier is firstly operated. Also, once the linear power amplifier is operated, the initialization operation is not performed.

When the initialization operation is completed, the CPU 811 outputs the switch control signal SWC for selection of the first signal SF1 outputted in the power divider 231 in order to determine the service channel in step 1011 and outputs the control data PCD for selection of the first channel of the transmitting band in step 1013. In this case, the signal selector 235 selectively outputs the first signal SF1 by the switch control signal SWC and the signal detector 236 detects the RSSI for the first channel frequency by the control data PCD.

-28- 15 Thereafter, the controller 237 stores the RSSI received in the set channel, in the corresponding channel area of the RAM 813 in step 1015 and increase the channel number in order to detect the RSSI of the next channel in step 1017. The channel scanning operation as described above is performed to the last channel of the transmitting band while repeatedly performing steps 1011 to 1019.

Concerning the channel scanning operation performed as above, the controller 237 detects the RSSI detected in each channel and stores the detected RSSI in an interior thereof while sequentially increasing the channel number from the first channel to the final channel with respect to the total channels of 10 the transmitting band. In the case that the mobile communication system is a code division multiplexing access (hereinafter, referred to as CDMA), the transmitting band is 869.640MHz to 893.19MHz and the channel interval is 1.23MHz. Thus, in the case of the CDMA system, the band of the first signal SF1 is 869.640MHZ to 893.19MHz, the control data PCD is to designate the 15 first signal SF1 from the first channel frequency, 869.640MHz as 20nth channel frequency, 893.10MHz, in an interval of 1.23MHz, in a sequential manner. In the CDMA system as mentioned previously, the controller 237 detects the RSSI of the designated channel and stores the detected RSSI in the RAM 813 while orderly designating each channel frequency of the transmitting band of S 20 869.640MHz to 893.19Mz in the channel scanning operations.

When the channel scanning operation is finalized, the controller 237 summarizes the RSSI of the overall channels which are stored in the RAM 813 in step 1021 and calculates the average value by dividing the summarized value of the RSSI of the overall channels by the number of the channels in step 1023.

29- -16- Following that, while performing steps 1015 to 1035, the controller 237 determines the service channels. Regarding the steps for determining the service channel, the controller 237 access the RSSI values of each channel stored in the RAM 823 in an order manner and compares the accessed value with the averaged value. Then, upon checked in step 1027 that the RSSI of the channel is more than the averaged value, the controller 237 checks in step 1029, whether or not the RSSI value of the corresponding channel is more than a reference value +a Herein, it is assumed that a 3dB. Thus, if the RSSI value of the present channel is more than the average value and the reference value in the aforesaid steps 1027 and 1029, the controller 237 checks in step 1029, whether or not the RSSI value of the corresponding ,'hannel is more 30dB than the reference value +ac This to set the channels having the confident signal distortion as the service channel even if the detected RSSI value is more than the average value. When the RSSI value of the present channel is more than the average value and the reference value +ca the controller 237 sets the corresponding channel as the service channel in step 1031. While repeatedly performing steps 1025 to 1035, the controller 237 checks the size of the RSSI of the overall channels and sets the service channels.

After selecting the first signal SF1 as described hereinabove, the controller 237 detects and analyzes the RSSI value of the overall channels of the band of the first signal SF1, and sets and stores the channel to be transmitted and serviced. Thereafter, the cc ntroller 237 amplifies and outputs the RF signals of the set service channels. However, for convenience of the explanation, two sequent channels are serviced in the embodiment of the present invention. At this time, the frequency of the RF signal of each channel is assumed as fl and f2, L i -r 17and the intermodulation signal is assumed as IM1 to IM2.

In FIG. 10, through steps 1111 to 1163, the controller 237 checks the intermodulation signal included in the output of the main power amplifier 214 and controls the variable attenuator 315 and the variable phase shifter 316. The predistortor 213 generates the predistortion signal for suppression of the intermodulation signal capable of being generated in the main power amplifier 214 upon amplification, and the controller 237 detects the RSSI of the .'ao intermodulation signal included in the output of the main power amplifier 214 and variably controls the phase and the level of the predistortion signal, so that the intermodulation signal can be smoothly suppressed in the main power amplifier 214. In the embodiment of the present invention, after detecting the RSSI of the intermodulation signal outputted in the main power amplifier 214, it is assumed that the controller 237 compares the detected value with the RSSI of the intermodulation signal of the previous state, and performs control 15 operations of three steps according to the compared results. Here, it is assumed that the ADC 814 and the DAC 815 are 16 bit converters, the first step is set as a' three steps, the second step is set as ten steps, and the third step is set as steps. The step becomes a quantization step upon A/D conversion. And then, in the time when the initial level and phase is controlled, the controller 237 increases the phase and the attenuation control signal by 1 step and the RSSI of the IM signal is detected from the second control operation to X'nth control operation. The controller 237 controls it as the first step in the case that the comparison difference is below ten steps, controls it as the second step in the case that the comparison difference is below 20 steps, controls it as the third step in the case that the comparison difference is above 20 steps. As mentioned -31 r L I L- *F -L LI 18 above, the operation of controlling the level and the phase of the predistortion signal is consecutively performed in X times.

The controller 237 outputs the switch control signal SWC for selection of the second signal SF2 in step 1111. Thus, the signal selector 235 selects the signal as shown in FIG. 11A which is outputted in the main power amplifier 214, thereby outputting the selected signal to the signal detector 236. To meet it, the controller 237 checks in step 1113, whether or not the value of the HG count us set as 0. At this time, the HG count counts the suppressed number of the intermodulation signal contained in the main power amplifier 214. Here, i 10 when the value of the HG count is set as 0, the controller 237 outputs the phase control signal PIC3 as the phase control signal PPPIC3 1 step value of the previous state (initial state) in step 1115, and converts the phase control signal PIC3 into the analog signal by the DAC6 of the DAC 815, then to be applied to the variable attenuator 316. Thus, the variable attenuator 316 of the predistortor 15 213 adjusts the phase of the predistortion signal outputted in the harmonics generator 314 by the phase control signal PIC3 and couples the adjusted level to the input terminal of the main power amplifier 214. And then, in step 1117, the controller 237 stores the phase control signal PIC3 as the previous phase control signal PPIC3 for the next state. Also, the controller 237, in step 1119, outputs the attenuation control signal ATT3 as the attenuation control signal PATT3 1 of the previous state and converts the attenuation control signal ATT3 into the analog signal by the DAC5 to be applied to the variable attenuator 315. At this point, the variable attenuator 315 of the predistortor 213 adjusts the level of the predistortion signal outputted in the harmonics generator 314 by the attenuation control signal ATT3 and couples the adjusted level to the input terminal of the -32

L

19- ,i i main power amplifier 214. Following that, the controller 237 stores the attenuation control signal ATT3 as the previous attenuation control signal PATT3 in step 1121.

It can be seen from that the first phase and level controlling of the predistortion signal as stated above is performed by adding one step to the control signal of the previous state. However, the corresponding control signal can occur with comparing the difference between the present detected control signal and the control signal of the previous state. After controlling the phase and the level of the predistortion signal as described above, the controller 237 increases the HG count in step 1161.

After controlling the phase and the level of the predistortion signal as described hereinbefore, the controller 237 again performs steps 1123 to 1135, detects the RSSIs of the intermodulation signals IM1 to IM4 included in the output of the main power amplifier 214 and selects the intermodulation IM 15 having the greatest RSSI value in step 1139.

i To meet it, the controller 237 sequentially outputs the control data PCD for designating the signals IM1 to IM4 as the intermodulation signals in the output of the main power amplifier 214 outputted in the signal detector 236 as shown in FIG. 11A, and receives and stores the RSSI value of the corresponding 20 IMI to IM4 intermodulation signal.

Following that, in step 1141, the controller 237 compares the RSSI of the IM signal selected with the phase control signal PPIC3 of the previous state. At 33 h I- -cU I--I ~e I~b--c-~plPS this moment, if the IM signal is more than the phase control signal PPIC3, the controller 237 sets the phase control value to be decreased in step 1143 and, if the IM signal is less than the phase control signal PPIC3, the controller 237 sets the phase control value to be increased in step 1145. After setting the increase/decrease of the phase control, the controller 237 obtains the subtraction between the value of the IM signal and the phase control signal PPIC3 of the previous state in step 1147, thereby generating the phase control signal PIC3 depending on the above subtraction. The phase control signal PIC3 is applied to the variable phase shifter 316 through the DAC 815. Thereafter, the controller 237 stores the phase control signal PIC3 as the previous phase control signal "oo. PPIC3 to be used in the next state.

In addition, after generating the phase control signal PIC3 as explained above, the controller 237 compares the RSSI of the IM signal selected with the attenuation control signal PATT3 of the previou state in step 1151. In this case, 15 if the IM signal is more than the attenuation control signal PATT3, the controller 237 sets the attenuation control value to be decreased in step 1153. To the contrary, if the IM signal is less than the attenuation control signal PATT3, the controller 237 sets the attenuation control value to be increased in step 1155.

After setting the increase/decrease of the attenuation control as described above, the controller 237 obtains the subtraction between the value of the IM signal and the attenuation control signal PATT3 of the previous state in step 1157, thereby generating the attenuation control signal ATT3 according to the above subtraction. The attenuation control signal ATT3 is applied to the variable attenuator 315 through the DAC 815. Thereafter, the controller 237 stores the attenuation control signal ATT3 as the previous attenuation control signal PATT3 -34- -21 4 in step 1159.

Hereafter, in step 1161, the controller 237 increases the HG count by one and thus, checks whether or not the HG count becomes X value. Then, when the HG count does not become the X value, the controller 237 returns to the aforesaid step 1071, thereby repeatedly performing the above steps. While repeating the above steps, the controller 237 detects the RSSI of the intermodulation signal contained in the output of the main power amplifier 214 and thus, adjusts the phase and the level of the predistortion signal by being compared with the phase and attenuation control signals PIC and ATT and 10 determining the control direction and the control size. Here, the predistortion signal is applied as the back phase of the intermodulation signal to be generated to the main power amplifier 214. At the same of adjusting the phase and the level of the predistortion signal, the controller 237 prevents the generation of the intermodulation signal and, if the HG count becomes X, completes the operation 15 of adjusting the predistortion signal.

I After adjusting the phase and the level of the predistortion signal, the Scontroller 237 performs the operation to suppress the RF signal distortion i included in the output of the signal canceler 219.

In FIG. 10, the controller 237 detects, in steps 1211 to 1255, the RF signal distortion pertaining to the output of the signal canceler 219 and controls the first variable attenuator 211 and the first variable phase shifter 212. The signal canceler 219 cancels the output of the main power amplifier 214 as shown in FIG. 11A and the RF signal to be inputted, and detects only the I -1A I Y ~P -22- 1 1 intermodulation signal generated upon amplification. At this point, the controller 237 detects the RSSI of the RF signal included in the output of the signal canceler 219 as shown in FIG. 11B and variably controls the level and the phase of the RF signal so as smoothly to suppress the RF signal in the signal canceler 219. In the embodiment of the present invention, after detecting the RSSI of the RF signal outputted in the signal canceler 219, the controller 237 compares the detected value with the RSSI of the RF signal of the previous state and performs the control operation including three steps depending on the comparison difference. Herein, when it is assumed that the ADC 814 is the 16 bit converter, the first step is set as three steps, the second step is set as ten steps, and the third step is set as 20 steps. The step becomes the quantization step upon A/D conversion. And then, at the point when the phase and the level are initially controlled, the controller 237 controls the phase and the level as the first step regardless of the detected RSSI, controls it as the first step in the case that the comparison difference is below ten steps, controls it as the second step in the case that the comparison difference is below 20 steps, controls it as the third step in the case that the comparison difference is above 20 steps. As mentioned above, the operations of controlling the level and the phase of the predistortion signal are consecutively performed in X times.

The controller 237 outputs the switch control signal SWC for selection of the third signal SF3 in step 1211. Thus, the signal selector 235 selects the signal as shown in FIG. 11A which is outputted in the signal canceler 219, thereby outputting the selected signal to the signal detector 236. Hereafter, the controller 237 detects and analyzes the RSSI of the intermodulation signal included in the signal canceler 219, controls the first variable attenuator 211 and the first -36- -23it.

I

variable phase shifter 212 and adjusts the level and the phase of the RF signal.

To meet it, the controller 237 checks in step 1212 whether or not the sub count is set as 0. Herein, the sub count counts the number of the canceling the RF signal included in the signal canceler 219. Upon the value of the sub count is set as 0, the controller 237 outputs the phase control signal PICI as the phase control signal PPIC1 1 step of the previous signal to be stored in step 1215, and converts the phase control signal PIC1 into the analog signal by the DAC2 of the DAC 815 to be applied to the first variable phase shifter 212. Thus, the first variable phase shifter 212 adjusts the phase of the RF signal inputted by the 0 10 phase control signal PIC1 and outputs the adjusted phase to the main power amplifier 214. Further, in step 1217, the controller 237 stores the phase control signal PIC1 as the previous phase control signal PPIC1 for the next state.

Furthermore, the controller 237 outputs the attenuation control signal ATT1 as the attenuation control signal PATT1 1 step of the previous state in step 1219, 15 and converts the attenuation control signal ATT1 into the analog signal by the DAC1 then to be applied to the variable attenuator 315. Thus, the first variable attenuator 211 adjusts the level of the RF signal inputted by the attenuation control signal ATT1 and inputs the adjusted level to the main power amplifier 214.

The first phase and level of the RF signal as stated above is controlled by adding one step to the control signal of the previous state. However, the corresponding control signal can occur with comparing the difference between the present detected control signal and the control signal of the previous state.

After controlling the phase and the level of the RF signal as described above, the 37 -24- II controller 237 increases the SUB count in step 1253.

To the contrary, when checked in step 1211 that the SUB count us set as 0, the controller 237 sequentially outputs the control data PCD for designating signals fl to f2 in the output of the signal canceler 219 outputted as shown in FIG. 11B, and receives and stores the RSSI value of the corresponding signal fl to f2. The controller 237 selects the f signal having the greatest RSSI value among the fl to f2 signals in step 1231.

Following that, the controller 237 compares the RSSI of the f signal selected with the phase control signal PPIC1 of the previous state in step 1233.

At this time, if the f signal is more than the phase control signal PPIC1, the controller 237 sets the phase control value to be decreased in step 1235 and, if the f signal is less than the phase control signal PPIC1, the controller 237 sets the phase control value to be increased in step 1237. After setting the increase/decrease of the phase control, the controller 237 obtains the subtraction between the value of the f signal and the phase control signal PPIC3 of the previous state in step 1239, thereby generating the phase control signal PIC1 according to the above subtraction. The phase control signal PIC1 is applied to the first variable phase shifter 212 through the DAC 815. Thereafter, the controller 237 stores the phase control signal PIC1 as the previous phase control signal PPIC1 to be used in the next state.

In addition, after generating the phase control signal PIC1 in step 1243, the controller 237 compares the RSSI of the f signal selected with the value of the attenuation control signal PATT1 of the previous state. In this event, if the 38 j t f signal is more than the attenuation control signal PATTI, the controller 237 sets the attenuation control value PATTI to be decreased in step 1245 and, if the f signal is less than the attenuation control signal PATT1, the controller 237 sets the attenuation control value PATTI to be increased in step 1247. After setting the increase/decrease of the attenuation control, the controller 237 obtains the subtraction between the value of the f signal and the attenuation control signal PPIC1 of the previous state in step 1249, thereby generating the attenuation control signal ATT1 according to the above subtraction. The attenuation control a signal ATT1 is applied to the first variable attenuator 211 through the DAC 815.

Thereafter, in step 1251, the controller 237 stores the attenuation control signal S' ATT1 as the previous attenuation control signal PATT1.

Hereafter, after increasing the SUB count by one in step 1253, the controller 237 checks in step 1253 whether or not the SUB count becomes Y value. Then, when the SUB count does not become the Y value, the controller .15 237 returns to step 1223, thereby repeatedly performing the above steps. While repeating the above steps, the controller 237 detects the RSSI of the RF signal contained ir, the signal canceler 219 and thus, adjusts the phase and the level of the RF signal by comparing the RSSI of the RF signal outputted from the signal canceler 219 in the previous phase and determining the control direction and the i J 20 control size. While adjusting the phase and the level of the RF signal inputted as above, the controller 237 prevents the generation of the RF signal pertaining to the signal and, if the SUB count becomes Y, completes the operation of suppressing the RF signal included in the signal canceler 219.

In FIG. 10, the controller 237 detects, in steps 1311 to 1363, the 39 I Bs~ J er s -Ila -26 intermodulation signal IM included in the RF signal which finally outputted in the main power amplifier 214 and controls the second variab.& attenuator 220 and the second variable phase shifter 221. The RF signal outputted in the main power amplifier 214 is compensated through the second delay 215 during the intermodulation signal detected in the sub path is processed, and the intermodulation signal distortion included in the RF signal which is finally outputted by being coupled with back phase of the intermodulation distortion processed in the sub path by the signal coupler 223 can be suppressed. In this S°case, the intermodulation signal distortion can be included in the RF signal which is finally outputted and the included intermodulation distortion can not help being suppressed. At this moment, the controller 237 detects the RSSI of the intermodulation signals IM1 to IM4 included in the output of the main power amplifier 214 as shown in FIG. 11C and variably controls the phase and the level of the intermodulation signals IM1 to IM4, in order that the intermodulation signal distortion pertaining to the RF signal which is finally outputted by the signal coupler 223, can be smoothly suppressed in the main power amplifier 214. In the embodiment of the present invention, after detecting the RSSI of the intermodulation signals IM1 to IM4 contained in the RF signal amplified and finally outputted, it is assumed that the controller 237 compares the detected value with the RSSI of the intermodulation signals IM1 to IM4 of the previous state, and performs the control operation of three steps according to the compared results. Herein, it is assumed that the ADC 814 is the 16 bit converter, the first step is set as three steps, the second step is set as ten steps, and the third step is set as 20 steps. The step becomes the quantization step upon A/D conversion. And then, in the time when the initial level and phase is controlled, the controller 237 increases the phase and the attenuation cont:ol 40 a -27signal by 1 step and the RSSI of the IM signal is detected from the second control operation to X'nth control operation. The controller 237 controls it as the first step in the case that the comparison difference is below ten steps, controls it as the second step in the case that the comparison difference is below 20 steps, controls it as the third step in the case that the comparison difference is above steps. As mentioned above, the operation of controlling the level and the phase of the predistortion signal is consecutively performed in Z times.

As illustrated in FIG. 10, steps 1311 to 1363 are processed with the same order as that of the aforesaid step 1111 to 1163 for adjusting the level and the 10 phase of the predistortion signal. Namely, the controller 237 controls the signal selector 235, selects the fourth signal SF4, controls the signal detector 236, and sequentially selects the intermodulation signals IM1 to IM4. Hereafter, the fj controller 237 sequentially receives the RSSIs of the intermodulation signals IM1 to IM4 detected in the signal detector 236. After selecting the intermodulation signal IM having the greatest RSSI in the received intermodulation signals IM1 to IM4, the controller 237 compares the RSSI of the present detected intermodulation signal IM with the corresponding intermodulation signal IM of the previous state. The controller 237 controls the second variable phase shifter 221 and the second variable attenuator 220 with obtaining the phase control signal PiC2 and the attenuation control signal ATT2 corresponding to the comparison difference between the above intermodulation signals distortions. At this time, the controller 239 controls the second variable attenuator 220 and the second variable phase shifter 221 by Z times.

As shown in FIG. 10, the linear power amplifier according to the -41 f -28 II embodiment of the present invention sets the service channels and adjusts the level and the phase of the predistortion signal for suppression of the intermodulation signal included in the main power amplifier 214, in a sequential manner. Also, the above amplifier adjusts the phase and the level of the RF signal inputted in the main path for suppression of the RF signal contained in the signal canceler 219, and the level and the phase of the intermodulation signal outputted in the signal canceler 129, so that the intermodulation signal pertaining to the amplified and finally-outputted RF signal can be suppressed.

As well, an example according to the embodiment of the present invention 10 can be achieved with firstly selecting the service channels, secondly controlling the phase and the level of the predistortion signal, thirdly controlling the phase and the level of the RF signal inputted, and fourthly controlling the phase and the level of the intermodulation signal distortion outputted in the signal canceler 219. However, as another embodiment thereto, the operation of selecting the service channels can be performed in an interval of given times by a timer interrupt. In the case of using the above control method, the controller 237 performs the service channel seek operation whenever the timer interrupt is generated, and controls the variable attenuators and the variable phase shifters as noted above in the rest of periods. At this point, upon the timer interrupt is generated in the state where an arbitrary variable attenuator and an arbitrary variable phase shifter are controlled, the controller 237 interrupts the operation and performs the timer interrupt service routine, thereby again returning to the main routine and performing the operation which is under procession.

Further, with respect to FIG. 10, while the number, that is, X, Y, and Z 't -42- -29which the variable attenuators and the variable phase shifters are controlled, can be set as the number capable of effectively controlling the level and the phase of the signal inputted in corresponding variable attenuator and variable phase shifter, the number is set as the same number as each other, more concretely, S. 10 e a a, FIG. 12 is a block diagram showing the construction of a linear power amplifier according to a second embodiment of the present invention. The linear power amplifier according a second embodiment of the present invention has the same construction as that according the first embodiment thereof, as shown in FIG. 1, except that the first variable attenuator 211 and the first variable phase shifter 212 are positioned in the sub path.

I..

x.

In connection with FIG. 12, the predistortor 213 on the main path has the same construction as that as shown in FIGs. 3 and 5, generates the harmonics corresponding to the inputted RF signal, controls the level and the phase of the harmonics depending on the attenuation control signal ATT3 and the phase control signal PIC3 of the controller 237, couples the controlled signals to the inputted RF signal, converts the coupled signals into the predistorted RF signal and outputs the converted signals to the main power amplifier 214. The main power amplifier 214 inputs the output in the predistortor 213, amplifies the predistorted RF signal, and outputs the RF signal where the intermodulation signal distortion is suppressed.

The rest construction of the linear power amplifier is equal to that in the first embodiment of the present invention as shown in FIG. 2, except for the 43 d ,I uC! above construction. Thus, the numeral references of the second embodiment of the present invention are equal to those of the first embodiment thereof.

Furthermore, the controller 237 selectively inputs the first signal SF1 to the fourth signal SF4 in the same manner as that of FIG. 10 and generates the attenuation control signals ATTI to ATT3 and the phase control signals PIC1 to PIC3 with detection of the RSSI of the RF signal or the intermodulation signal in the selected SF signal. After setting the service channels, the controller 237 orderly adjusts the phase and the level of the predi tortion signal for suppression of the intermodulation signal pertaining to the main power amplifier 214, adjusts 10 the level and the phase of the Rf signal inputted in the sub path so as to suppress the RF signal distortion included in the signal canceler 219, and lastly adjusts the .i level and the phase of the intermodulation signal distortion outputted in the signal canceler 129 so as to suppress the intermodulation signal distortion pertaining to the amplified and finally-outputted RF signal.

15 FIG. 13 is a block diagram showing the construction of a linear power amplifier according to a third embodiment of the present invention. The linear power amplifier according a third embodiment of the present invention has the same construction as that according the second embodiment thereof, as shown in FIG. 13, except that the first variable attenuator 211 and the first variable phase shifter 212 are positioned between the main path and the sub path.

With regard to FIG. 12, the predistortor 213 on the main path has the same construction as that shown in FIGs. 3 and 5, generates the harmonics corresponding to the inputted RF signal, controls the leve nd the phase of the harmonics depending on the attenuation control signal ATT3 and the phase -n :i L I y I C- I C ICcontrol signal PIC3 of the controller 237, couples the controlled signals to the inputted RF signal, converts the coupled signals into the predistorted signal, and lastly outputs the converted signal to the main power amplifier 214. The main power amplifier 214 inputs the output to the predistortor 213 and outputs the RF signal where the intermodulation signal distortion is suppressed, through amplifying the predistorted RF signal.

The first delay 217 located at the sub path, inputs the RF signal divided in the main path by the power divider 216, delay,- the RF signal during the RF signal is processed in the predistortor 213 and the main power amplifier 214, and outputs the delayed RF signal to the signal canceler 219.

The first variable attenuator 211 and the first variable phase shifter 212 are connected between the power divider 218 and the signal canceler 219, which respectively control the level and the phase of the RF signal inputted by the attenuation control signal ATT1 and the phase control signal PIC1 outputted in the controller 237 and outputs the controlled level and phase to the signal canceler 219. That is, the first variable attenuator 211 and the first variable phase shifter 212 are positioned between the main path and the sub path, and the phase and the level of the RF signal amplified and outputted in the main power amplifier 214 on the main path are controlled to thereby be outputted to the signal canceler 219.

The rest construction of the linear power amplifier is equal to that in the first embodiment of the present invention as shown in FIG. 2, except for the above construction. Thus, the numeral references of the second embodiment of 45 -32the present invention are equal to those of the first embodiment thereof.

Furthermore, the controller 237 selectively inputs the first signal*pl88XSF1 the fourth signal SF4 in the same manner as that of FIG. 10 and generates the to attenuation control signals ATT1 ATT3 and the phase control signals PIC1 to PIC3 with detection of the RSSI of the RF signal or the intermodulation signal in the selected SF signal. After setting the service channels, the controller 237 orderly adjusts the phase and the level of the predistortion signal for suppression of the intermodulation signal pertaining to the main power amplifier 214, adjusts the level and the phase of the RF signal inputted in the sub path so as to suppress 10 the RF signal distortion included in the signal canceler 219, and lastly adjusts the S. level and the phase of the intermodulation signal distortion outputted in the signal canceler 129 so as to suppress the intermodulation signal distortion pertaining to the amplified and finally-outputted RF signal.

Like the linear power amplifier according to the first embodiment of the present invention, the linear power amplifiers according the second and third 1. embodiments of the present invention, firstly select the service channel, secondly control the phase and the level of the predistortion signal, thirdly control the phase and the level of the inputted RF signal, and fourthly controls the phase Sthe level of the intermodulation signal outputted in the signal canceler 219. On the contrary, as another embodiment thereto, the operation of selecting the service channel can be performed iin an interval of given times by the timer interrupt. In the case of using the above control method, the controller 237 performs the service channel seek operation whenever the timer interrupt is generated, and controls the variable attenuators and the variable phase shifters -46- 3- 4I'7 as noted above in the rest of periods. At this point, upon the timer interrupt is generated in the state where an arbitrary variable attenuator and an variable phase shifter are controlled, the controller 237 interrupts the operation and performs the timer interrupt service routine, thereby again returning to the main routine and performing the operation which is under procession.

Moreover, with respect to FIG. 10, while the number, that is, X, Y, and Z which the variable attenuators and the variable phase shifters are controlled, can be set as the number capable of effectively controlling the level and the phase of the signal inputted in corresponding variable attenuator and variable phase shifter, the number is set as the same number as each other, more *concretely, As may be apparent form the foregoing, the linear power amplifier according to the embodiment of the present invention effectively divides and i controls the intermodulation signal distortion with the predistortion system and the feedforward system. In other words, the linear power amplifier firstly suppresses the intermodulation signal distortion capable of being generated in the S' main power amplifier by using the predistortion system and secondly suppresses the intermodulation signal pertaining to the output of the main power amplifier by using the feedforward system. In this manner, it is easy to design and make the main power amplifier 214 or the error amplifier 222. Likewise, since the variable attenuators and the variable phase shifters performing the linearity function, have their wide bandwidth in the frequency characteristics and their relatively good flatness, and their good variable characteristics, the linear power amplifier according to the present invention can be used for other usages.

47 -34- I i. IDX--Pal--Y II Therefore, it should be understood that the present invention is not limited to the particular embodiment disclosed herein as the best mode contemplated for carrying out the present invention, but rather that the present invention is not limited to the specific embodiments described in this specification except as defined in the appended claims.

i i i -48a sr ~-LC pll 1

Claims (3)

1. A linear power amplifier network having a main power amplifier, having: an input terminal for receivina an input signal; an output terminal for providing an amplified output signal; i a predistortion system connected to said input terminal in a first signal path, for initially suppressing a distortion produced by said main power amplifier by distorting the input signal to said main power amplifier to generate a predistortion signal having the input signal i included therein representing a distortion substantially complementary to the distortion produced by said main power amplifier, said predistortion system having a power divider 1 for routing the input signal from said input terminal, and i automatic level controller for controlling amplitude of said input signal to generate an amplitude controlled S:signal, a harmonics generator for generating harmonics i 20 corresponding to said amplitude controlled signal and a I signal coupler for coupling said harmonics with said input i signal to generate said predistortion signal; i said main power amplifier connected to said predistortion system in said first signal path, for j 25 amplifying the predistortion signal to generate a power j amplified signal; i a feedforward system connected to said input terminal and said output terminal in a second signal path, for finally suppressing said distortion produced by said 30 main power amplifier by cancelling the input signal and the power amplified signal to generate an error signal representing the distortion produced by said main power amplifier, error amplifying the error signal to generate an amplified error signal, and combining said amplified error signal with said power amplified signal to generate said amplified output signal at said output terminal. H SuanKeep\ c\204-97-G 230998 H!\Suoan\Keep\peci\2048-97-H.l .OC 2/0I1/98 ~I

36- 50 2. The linear power amplifier network of claim 1, wherein said predistortion system generates said predistortion signal representing the distortion substantially complementary to the distortions, in terms of amplitude and phase, produced by said main power amplifier. 3. The linear power amplifier network of claim 1, wherein said automatic level controller has: a variable attenuator disposed between said power divider and said harmonics generator, for attenuating the amplitude of said input signal to generate said amplitude controlled signal; a power detector for converting said amplitude controlled signal into direct current voltage; and a level controller for controlling operation of said variable attenuator in accordance with the direct current voltage from said power detector for enabling generation of said amplitude controlled signal. 20 4. A linear power amplifier network, having: "an input terminal for receiving an input signal; an output terminal for providing an amplified output signal; o; a main power amplifier; a predistortion system diiposed between said input terminal and said main power amplifier for suppressing distortion produced by said main power amplifier, said predistortion system having a first directional coupler for routing the input signal from said o. 30 input terminal, an automatic level controller for C"a° controlling the amplitude of said input signal to generate a •an amplitude controlled signal, a harmonics generator, for generating harmonics corresponding to said amplitude controlled signal to generate a harmonic signal, a first variable attenuator for attenuating the harmonic signal to generate an attenuated signal in accordance with a first attenuation control signal, a variable phase shifter for S. t ti\Suan\Keep\crecl\20148- 9 7-NGM.I.DOC 21/01/98 t) cJ 8U LILQ IVr-I UL UI 1AF 61gliicU UU3%l.I ILLJ LU -37 51 controlling the phase of said attenuated signal to generate a phase shifted signal in accordance with a first phase control signal, and a first signal coupler for coupling said phase shifted signal with said input signal to generate a predistortion signal representing a distortion substantially complementary to the distortion produced by said main power amplifier; and a feedforward system disposed between said input terminal and said output terminal for suppressing said distortion produced by said main power amplifier by cancelling the input signal and an output of said main power amplifier to produce an error signal with predetermined amplification representing the distortion produced by said main power amplifier and combining said error signal with the output of said main power amplifier to generate said amplified output signal at said output terminal. The linear power amplifier network of claim 4, wherein said automatic level controller has: a variable attenuator disposed between said power a' divider and said harmonics generator, for attenuating the amplitude of said input signal to generate said amplitude controlled signal; 25 a power detector for converting said amplitude controlled signal into direct current voltage; and :a level controller for controlling operation of said variable attenuator in accordance with the direct "current voltage from said power detector for enabling 30 generation of said amplitude controlled signal. 6. The linear power amplifier network of claim 4, wherein said automatic level controller has a power detector coupled to receive said input signal for transforming said input signal into a direct current control voltage for controlling amplitude gain of said input signal to generate said amplitude controlled signal. H:\uan\Keep\opecl\20148-97-NGM.I.DOC 2 3/09/98 7- -38- -52- 7. The linear amplifier network of claim 6, wherein said power detector has: a transformer for transforming said input signal into a first transformed signal and a second transformed signal having a phase difference of 1800; first and second Schottky diodes disposed to convert the first and second transformed signals into said direct current control voltage; and means for filtering said direct current control voltage. 8. A linear power amplifier network, having: an input terminal for receiving an input signal; an output terminal for providing an amplified output signal; a main power amplifier; a predistortion system disposed in a first path between said input terminal and said main power amplifier, for initially suppressing distortion produced by said main power amplifier to generate a predistortion signal having said input signal included therein representing a distortion substantially complementary to the distortion produced by said main power amplifier. 25 a feedforward system disposed in a second path between said main power amplifier and said output terminal, for finally suppressing said distortion produced by said i "main power amplifier by cancelling the input signal and an i output of said main power amplifier to generate an error signal representing the distortion produced by said main power amplifier, and combining said error signal exhibiting a predetermined amplification level with said output of said main power amplifier to generate said amplified output signal at said output terminal, said feedforward system comprising; a directional coupler for routing said input signal from said first signal path to said second path; H!\SuouAn\Keep\opecl\20148-'V7-tnM.I.DOC 2)/q/ 0 -39- 53 signal canceller means for cancelling said input signal of said second signal path and said outp-- of said main power amplifier to generate said error signal representing the distortion produced by said main power amplifier; an error amplifier for amplifying said error signal with said predetermined amplification level; and a signal coupler for coupling said error signal exhibiting said predetermined amplification level with said output of said main power amplifier in said main signal path so as to generate said amplified output signal at said output terminal free of distortion. 9. The linear power amplifier network of claim 4, wherein said feedforward system has: a second directional coupler for routing said input signal from said first signal path to said second signal path; signal canceller means for cancelling said input signal of second signal path and said power amplified signal generated from said main power amplifier to generate said error sig'. representing the distortion produced by said main power amplifier; an error amplifier for amplifying said error 25 signal to generate said amplified error signal; and a second signal coupler for coupling said amplified error signal with said power amplified signal generated from said main power amplifier in said main signal path so as to generate said amplified output signal 30 at said output terminal free of distortion. 10. A linear power amplifier network, having: a predistortion system positioned at a main path, for determining harmonics corresponding to an input signal, coupling the harmonics with said input signal to generate a predistortion signal; a main power amplifier for amplifying said i H:\SuiOan\Keep\speci\20148-97-NG.I .DOC 2J/09/98 controllea, ime controuler increases ne pnase anu e ULI uoUaII uaui 54 predistortion signal to generate a power amplified signal; a first variable attenuator and phase shifter positioned at a sub path, for adjusting the amplitude and phase of said input signal routed from said main path; a first delay for delaying said input signal having the amplitude and phase adjusted from said first variable attenuator and phase shifter for a first predetermined period to produce a first delayed signal; a signal canceller positioned at said sub path, for cancelling the power amplified signal from said main path and the first delayed signal to extract an error signal representing a distortion contained in said power amplified signal; a second variable attenuator and phase shifter for adjusting the amplitude and phase of said error signal; an error amplifier for amplifying said error signal having the amplitude and phase adjusted from said second variable attenuator and phase shifter to produce an amplified error signal; a second delay for delaying the power amplified signal for a second predetermined period to produce a second delayed signal; and a first signal coupler for coupling said amplified error signal with the second delayed signal to 25 generate a final output signal substantially free from distortion. N I a a *a i 11. The linear power amplifier network of claim wherein said predistortion system has: 30 a directional coupler for routing the input signal to said main path; an automatic level controller connected to said power divider, for controlling amplitude of said input signal to generate an amplitude controlled signal; a harmonics generator for generating harmonics corresponding to said amplitude controlled signal; and a second signal coupler for coupling said H:\GSUan\Keep\peci\20148-97-NGM.l.DOC 23/09/98 L 4erl LI p C-LL~- -L f- r~b~ As shown in FIG. 10, the linear power amplifier according to the |i 41 1- 7 I- 6 a 55 harmonics with said input signal to generate said predistortion signal. 12. A linear power amplifier network, having: first means for adjusting amplitude and phase of an input signal in accordance with a first attenuation control signal and a first phase control signal; a predistortion system positioned at a main path, for suppressing a distortion produced by a main power amplifier by distorting the input signal to said main power amplifier to generate a predistortion signal having the input signal included therein representing a distortion substantially complementary to the distortion produced by said main power amplifier; said main power amplifier connected to said predistortion system in said main path, for amplifying the predistortion signal to generate a power ar- ified signal; a signal canceller positioned at a sub path, for cancelling the power amplified signal from said main path with the input signal to extract an error signal representing a distortion contained in said powe amplified "signal; second means for adjusting the amplitude and phase of said error signal in accordance with a second 25 attenuation control signal and a second phase control signal; an error amplifier for amplifying said error So signal to generate an amplified error signal; a first signal coupler for coupling said 30 amplified error signal with the power amplified signal to generate a final output signal substantially free of distortion; a signal selector for generating a selected signal upon select'.on between the power amplified signal from said main power amplifier, the error signal from said signal canceller, and said final output signal; a signal detector for synchronizing frequencies iH:\susan\Keep\opecil20148-97-NaM.I.DOC 23/04/8 A I VVItAI A LU FIL. IV, wniie -Lfe nLuirlUer, UldiL 1, A, i, aiiu z- -42-

56- of the input signal and the error signal, and detecting a received signal strength indicator; and a controller for controlling said signal selector, said signal detector, and generating said first and second attenuation control signals and said first and second phase control signals. 13. The linear power amplifier network of claim 12. wherein said predistortion system has: a directional coupler for routing the input signal to said main path; an automatic level controller connected to said power divider, for controlling amplitude of said input signal to generate an amplitude controlled signal; a harmonics generator for generating harmonics corresponding to said amplitude controlled signal; and a second signal coupler for coupling said harmonics with said input signal to generate said predistortion signal. 14. The linea- power amplifier network of claim 12, wherein said detector has: a phase lock loop for generating a local frequency corresponding to input control data; o' 25 a mixer for mixing a signal output from said signal ,elector with the output of said phase lock loop; a filter for performing frequency down conversion of a frequency output from said mixer; and o a log amplifier for converting the output of said 30 filter into a direct voltage and outputting said converted voltage as said received signal strength indicator. 15. A method for eliminating an intermodulation distortion signal of a linear power amplifier which includes a main power amplifier, including the steps of: firstly suppressing said intermodulation .H:\Susan\Keep\spci\20148-97-NGM.l .DOC 23/09/'9 tirst embodiment or tne present invention as snown Ir riu. L, xcltcJL Lu1,, -43 r -l 57 distortion signal generated upon amplification of an input signal in said main power amplifier by constantly maintaining said input signal at a predetermined level, generating a harmonics signal corresponding to said input signal, and generating a precistortion signal after coupling said harmonics signal with said input signal; and secondly suppressing said intermodulation distortion signal by cancelling said input signal and an output of said main power amplifier, extracting said intermodulation distortion signal, error-amplifying the extracted intermodulation distortion signal, and coupling the amplified intermodulation distortion signal with the output of said main power amplifier. 16. A linear pcwer amplifying device in a mobile communication system, having: an amplifier for amplifying power of an input signal; 25 a detector for receiving an output signal of said amplifier to detect strength of an intermodulation signal containaed in the amplified signal; a controller comparing strength of the detected intermodulation signal with strength of a previous 30 intermodulation signal to generate an attenuation and phase cont! ol signal; and a predistortor having an intermodulation signal generator and a variable attenuator and phase shifter, wherein said intermodulation signal generator generates said intermodulation signal according to the level of a transmission signal, and according to a control signal of controller, said variable attenuator and phase shifter Ihr\Susan\Kee p\oeei\214,9-NCM.1 -DOC 2 3/0/)98 iiariiiuiulis uccjiiullig uii Lne auenuanon control signal A 1 ana LuI piia~s pill 58 58 controls gain and phase of said predistorted intermodulation signal to apply it to said transmission signal as an opposite phase, thereby applying said predistorted intermodulation signal to said amplifier. 17. The device as claimed in claim 16, wherein said predistortor has: an automatic level controller for automatically controlling a level in order to apply an RF transmission signal having a constant level; an intermodulation signal generator for generating an intermodulation signal of high-harmonic according to the level-controlled transmission signal; a variable attenuator and phase shifter for controlling gain and phase of said intermodulation signal inputted by attenuation and phase control signal of said controller; and a signal coupler for converting output signal of said variable attenuator and phase shifter as an opposite phase to couple the converted signal with said transmission signal. 18. The device as claimed in claim 17, wherein said automatic level controller has a 1800 transformer, a first 25 diode connected to said transformer via a first transmission line and a second diode connected said transformer via a second transmission line, whereby a signal outputted from said transformer is inputted to said Sfirst and second diodes per a half period, to be converted into a direct current. 19. The device as claimed in claim 16, wherein said detector has: an oscillator for generating a frequency for detection of an intermodulation signal; a mixer for multiplying output of said oscillator by the amplified signal to detect an intermodulation SH:\Susan\Keep\specl\20148-97-NM.l.D)OC 2309/98 l I I u I above construction. Thus, the numeral references of tne secunu ,iLu, 45 59 signal; and a filter for low-pass filtering said intermodulation signal to convert the signal into a direct current, thereby outputting it to said controller. A linear power amplifying device in a mobile communication system, having: a first variable attenuator and phase shifter for performing gain attenuation and phase control of a transmission signal inputted by a first attenuation and phase control signal; an amplifier for amplifying power of output signal of said first variable attenuator and phase shifter; a signal canceller for cancelling a transmission signal applied from said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output signal of said signal canceller according to a second attenuation and phase control signal; an error amplifier for amplifying power of output signal of said second variable attenuator and phase shifter; a signal coupler for coupling output signal of 25 said error amplifier with cutput terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case of output of the signal canceller is i 30 selected, a present output of the signal canceller is compared with the previous output thereof, thereby e' i° generating the first attenuation and phase control signal and in case that output of the signal coupler is selected, a present output of a signal coupler is compared with a previous output thereof, thereby generating the second attenuation and phase control signal; a selector for selecting output of said signal Ht\Sunan\Keep\pec\20148-9 7 NC. MI.DOC 2)309/8 generatea, anu CUIILFUIS LIM VarlaUlt aUIIeIiaUIoS aIu LIL vallauL -46 60 canceller and said signal coupler according to selection signal of the controller; and a detector for detecting strength of a signal outputted from the selector to output it to the controller. 21. The device as claimed in claim 20, wherein said device further has: a first delay positioned between the input signal and the signal canceller, for compensating delayed time according to the first variable attenuation and phase control; a second delay positioned between the amplifier and the coupler, for compensating delayed time according to the second variable attenuation and phase control. 22. The device as claimed in claim 20, wherein said detector has: an oscillator for generating a frequency of a transmission signal contained in output of the signal canceller and an intermodulation signal contained in the signal coupler selected by control of a controller; a mixer for multiplying output of said oscillator by the amplified signal to generate a transmission signal and an intermodulation signal; and 25 a filter for low-pass filtering output signal of said mixer to convert it into direct current, thereby outputting it to said controller. B 23. A linear power amplifying device in a mobile 30 communication system, having: an amplifier for amplifying power of a transmission signal; a first variable attenuator and phase shifter for performing gain attenuation and phase control for a transmission signal inputted by a first attenuation and a phase control signal; a signal canceller for cancelling output of a i 'H:\Susan\Keep\spec \20148-Q9-NGM.I.DOC 2)/09/98 x 'V r- 11ll IIVILII L-all UL LL3VU IVI VLII .I ulju-- -47- 1- 61 first variable attenuator and phase shifter from output of said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter for controlling gain attenuation and phase control for output of said canceller according to a second attenuation and phase control signal to generate an error signal; an error amplifier for amplifying output signal of said second variable attenuator and phase shifter; a signal coupler for coupling output of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of canceller is selected, the present output of the canceller is compared with the previous output of the canceller to generate a first attenuation and phase control signal, and in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase control signal; a selector for selecting output of the signal canceller and the signal coupler according to selection signal of the controller; and 25 a detector for detecting strength of a signal Soutputted from said selector to apply it to said controller. S' 24. A linear power amplifying device in a mobile 30 communication system, having: an amplifier for amplifying power of a transmission signal; i, a first variable accenuator and phase shifter for t performing gain attenuation and phase control for output of said amplifier according to a first attenuation and phase control signal; a signal canceller for cancelling a transmission H:\Suan\Keep\pecl\20148-97-NGH. DOC .3 09/98 i W 7 L^ -48- -62- signal applied from said first variable attenuator and phase shifter to detect an intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output of said signal canceller according to a second attenuation and phase control signal to generate an error signal; an error amplifier for amplifying output of a second variable attenuator and phase shifter; a signal coupler for coupling output of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of the signal canceller is selected, the present output of the signal canceller is compared with the previous output thereof to generate a first attenuation and phase control signal, and in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase control signal; a selector for selecting output of the signal *canceller and the signal coupler according to selection signal of the controller; and a detector for detecting strength of a signal outputted from said selector to apply it to said controller. 25. A linear power amplifying device in a mobile co.nmunication system, having: ~a first variable attenuator and phase shifter for 1 performing attenuation and phase control for a transmission signal inputted by a first attenuation and phase control signal; a predistortor having an intermodulation signal generator and a third variable attenuator and phase SH\Susan\Keep\opecl\20148- 9 7 -NGM.I DOC 23/09/48 ll .53 Bl qjI M.L W.L.A 0 A c aYW =JW CALL.LJ..LJ.o-.L o.r amplified output signal at said output terminal. H:Susa Keepspec 2014 97NG .DC /09/9 ~H:\Susan\Keep\peci\2014B-97-NGMI .DOC 213/09/98 i .4 63 shifter, wherein said intermodulation signal generator generates a distortion signal according to the level of transmission signal in which a first attenuation and phase control is performed, and a third variable attenuator and phase shifter controls gain and phase of said predistorted intermodulation signal according to a third attenuation and phase control signal of a controller; an amplifier for amplifying power of a transmission signal predistorted; a signal canceller for cancelling a transmission signal applied from said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output of said signal canceller according to a second attenuation and phase control signal; an error amplifier for amplifying output signal of said second variable attenuation and phase shifter; a signal coupler for coupling output of said 20 error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of the signal canceller is 25 selected, the present output of the signal canceller is compared with the previous output thereof to generate a first attenuation and phase control signal, in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase control signal, and in case that output of the amplifier is selected, the present output of the amplifier is compared with the previous output thereof to generate a third attenuation and phase control signal; a selector for selecting output of the signal canceller, the signal coupler and the amplifier according to selection signal of the controller; and os oo ro. oo r o 99 8 ro II 0 O 4 0 O -a' V/ H:\Suoan\Kee\opeci\20148-9)-NGM.I.DOC 23/09/98 I--e I va a jLte cartri-Umcno L cai^.^ generate an attenuated signal in accordance with a first I attenuation control signal, a variable phase shifter for i H:\susan\Keep\speci\20148-97-NGH.I.Doc 23/09/98 -64- a detector for detecting strength of a signal outputted from said selector to apply it to said controller. 26. The device as claimed in claim 25, wherein said predistortor has: an automatic level controller for automatically controlling a level in order to apply an RF transmission signal having a constant level; an intermodulation signal generator for generating an intermodulation signal of high-harmonic according to a level-controlled transmission signal; a variable attenuator and phase shifter for controlling gain and phase of said intermodulation signal inputted by attenuation and phase control signal of said controller; and a signal coupler for converting output signal of said variable attenuation and phase shifter as an opposite phase to couple the converted signal with the transmission signal. 27. The device as claimed in claim 26, wherein said automatic level controller has a 1800 transformer, a first diode connected to said transformer via a first transmission line and a second diode connected said transformer via a second transmission line, whereby a signal outputted from said transformer is inputted to said Sfirst and second diodes per a half period to convert level of the signal into a DC level. 28. The device as claimed in claim 26, wherein said detector has: an oscillator for generating a frequency for detection of an intermodulation signal; a mixer for multiplying output of said oscillator by the amplified signal to detect an intermodulation signal; and *H!\Su9n\Keep\cpec \2014B-97-NrM. I.DOC 2'/0"/4R 3 GLLA.d laB ll. pi-tu jjjjuu control voltage for controlling amplitude gain of said Sinput signal to generate said amplitude controlled signal. SH:\Susan\Keep\speci\20148-97-NGM..DOC 23/09/98 65 a filter for low-pass filtering an intermodulation signal to convert it into direct current, thereby applying it to said controller. 29. The device as claimed in claim 26, wherein said device further has: a first delay positioned between the input signal and the signal canceller, for compensating delayed time according to the first variable attenuation and phase control; a second delay positioned between the amplifier and the signal coupler, for compensating delayed time according to the second variable attenuation and phase control. A linear power amplifying device in a mobile communication system, having: a predistortor having an intermodulation signal generator and a third variable attenuator and phase shifter, wherein said intermodulation signal generator generates a distortion signal according to the level of S.transmission signal, and said third variable attenuator and phase shifter controls gain and phase of said predistorted intermodulation signal according to the third attenuation 25 and phase control signal of the controller; B an amplifier for amplifying power of the predistorted transmission signal; a first variable attenuator and phase shifter for performing gain attenuation and phase control of a 30 transmission signal inputted by a first attenuation and phase control signal; a signal canceller for cancelling a transmission signal applied from said amplifier to detect an intermodulation signal; a second variable attenuator and phase shifter for performing gain attenuation and phase control for output of said signal canceller according to a second H\Suoan\Keep\cPeC\20l48497-NM.t.tDOC 2 3/0I9/R 9 -I 4~rC -CBP r -Cd~Ld~s~ a directional coupler for routing said input signal from said first signal path to said second path; C H:\Susan\Keep\speci\20148-97-NGM. I.DOC 23/09/98 A) I 66 attenuation and phase control signal; an error amplifier for amplifying output signal of said second variable attenuator and phase shifter; a signal coupler for coupling output of said error amplifier with output terminal of said amplifier as an opposite phase to remove an intermodulation signal of the amplified signal; a controller for generating a selection signal, wherein in case that output of canceller is selected, the present output of the signal canceller is compared with the previous output thereof to generate a first attenuation and phase control signal, in case that output of the signal coupler is selected, the present output of the signal coupler is compared with the previous output thereof to generate a second attenuation and phase control signal, and in case that output of the amplifier is selected, the present output of the amplifier is compared with the previous output thereof to generate the third attenuation and phase control signal; a selector for selecting output of the signal canceller, the signal coupler and the amplifier according to selection signal of the controller; and a detector for detecting strength of a signal outputted from said selector to apply it to said cont roller. 31. A linear power amplifier network, substantially as herein described with reference to the accompanying drawings. S 32. A method for eliminating an intermodulation distortion signal of a linear power amplifier, substantially as herein described with reference to the accompanying drawings. usan\Keep\tc\201 48-s-NaM.I.a 2)3/Oq/ .L. -67- 33. A linear power amplifier device, substantially as herein described with reference to the accompanying drawings. Dated this 23rd day of September 1998 SAMSUNG ELECTRONICS CO., LTD. By their Patent Attorneys GRIFFITH HACK Fellows Institute of Paten Attorneys of Australia S 0 00 a ee o o0 o on a oo a c I ~e r -rb a~L- C- Abstract of the Disclosure A linear power amplifying device and method for dividing and removing the intermodulation 'dstortion with the predistortion system and the feedfordward system. The linear ouwer amplifying device having a main power amplifier, for eliminating an intermodulation signal, including: a predistortor for firstly suppressing the intermodulation signal generated upon amplification of an RF signal in the main power amplifier, by generating a harmonics corresponding to the inputted RF signal and a predistortion signal with coupling the RF signal to .o.the harmonics; and a feedforwarder for secondly suppressing the intermodulation 10 signal by canceling the inputted RF signal and the output of the main power amplifier, extracting an intermoduiation signal distortion, error-amplifying the extracted intermodulation signal distortion, and coupling the amplified intermodulation signal with the output of the main power amplifier. es e