AU4850985A - Data transmission apparatus - Google Patents

Data transmission apparatus

Info

Publication number
AU4850985A
AU4850985A AU48509/85A AU4850985A AU4850985A AU 4850985 A AU4850985 A AU 4850985A AU 48509/85 A AU48509/85 A AU 48509/85A AU 4850985 A AU4850985 A AU 4850985A AU 4850985 A AU4850985 A AU 4850985A
Authority
AU
Australia
Prior art keywords
dmux
demultiplexer
memory
data transmission
transmission apparatus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU48509/85A
Other versions
AU559000B2 (en
Inventor
Hans-Joachim Grallert
Werner Leigl
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of AU4850985A publication Critical patent/AU4850985A/en
Application granted granted Critical
Publication of AU559000B2 publication Critical patent/AU559000B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Radar Systems Or Details Thereof (AREA)
  • Communication Control (AREA)

Abstract

1. Arrangement for the conversion of codewords (CW) of varying length into datawords (DW) of constant length, characterized in that a demultiplexer (DMUX) is provided, to which the codewords (CW) are fed in parallel form, in that the outputs of the demultiplexer (DMUX) are connected to parallel inputs (EP) of a memory register (R2), in that the parallel outputs (AP) of the memory register (R2) are connected via a dataword-multiplexing device (MUX) to data inputs (E7) of a memory (ME) and in that control devices (ST1, ST2) are provided for the demultiplexer (DMUX), the dataword-multiplexing device (MUX) and for the memory (ME).
AU48509/85A 1984-10-12 1985-10-11 Data transmission apparatus Ceased AU559000B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3437503 1984-10-12
DE3437503 1984-10-12

Publications (2)

Publication Number Publication Date
AU4850985A true AU4850985A (en) 1986-04-17
AU559000B2 AU559000B2 (en) 1987-02-19

Family

ID=6247775

Family Applications (1)

Application Number Title Priority Date Filing Date
AU48509/85A Ceased AU559000B2 (en) 1984-10-12 1985-10-11 Data transmission apparatus

Country Status (7)

Country Link
EP (1) EP0180793B1 (en)
JP (1) JPS6195624A (en)
AT (1) ATE50074T1 (en)
AU (1) AU559000B2 (en)
BR (1) BR8505049A (en)
DE (1) DE3575800D1 (en)
NO (1) NO854054L (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3702490A1 (en) * 1987-01-28 1988-08-11 Thomson Brandt Gmbh METHOD AND DEVICE FOR DIGITAL MESSAGE TRANSMISSION AND / OR RECORDING AND REPLAYING
DE3736898A1 (en) * 1987-10-30 1989-05-11 Siemens Ag Arrangement for converting code words of different widths into data words of equal width
DE19743273C2 (en) * 1997-09-30 2001-03-01 Siemens Ag Register arrangement for the optional processing of input data words of different lengths

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS52105740A (en) * 1976-03-01 1977-09-05 Nippon Telegr & Teleph Corp <Ntt> Buffer memory fead-out control system
US4236206A (en) * 1978-10-25 1980-11-25 Digital Equipment Corporation Central processor unit for executing instructions of variable length

Also Published As

Publication number Publication date
JPS6195624A (en) 1986-05-14
EP0180793B1 (en) 1990-01-31
NO854054L (en) 1986-04-14
BR8505049A (en) 1986-07-29
ATE50074T1 (en) 1990-02-15
AU559000B2 (en) 1987-02-19
EP0180793A1 (en) 1986-05-14
DE3575800D1 (en) 1990-03-08

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