AU3588571A - A method of electrically connecting a semiconductor chip toa substrate - Google Patents

A method of electrically connecting a semiconductor chip toa substrate

Info

Publication number
AU3588571A
AU3588571A AU35885/71A AU3588571A AU3588571A AU 3588571 A AU3588571 A AU 3588571A AU 35885/71 A AU35885/71 A AU 35885/71A AU 3588571 A AU3588571 A AU 3588571A AU 3588571 A AU3588571 A AU 3588571A
Authority
AU
Australia
Prior art keywords
semiconductor chip
electrically connecting
toa
substrate
toa substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU35885/71A
Inventor
Alfred Solanki John
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ZF International UK Ltd
Original Assignee
Lucas Industries Ltd
Joseph Lucas Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB5572170A external-priority patent/GB1363431A/en
Application filed by Lucas Industries Ltd, Joseph Lucas Industries Ltd filed Critical Lucas Industries Ltd
Publication of AU3588571A publication Critical patent/AU3588571A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
AU35885/71A 1970-11-24 1971-11-18 A method of electrically connecting a semiconductor chip toa substrate Expired AU3588571A (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
GB5572170A GB1363431A (en) 1970-11-24 1970-11-24 Method of electrically connecting a semiconductor chip to a sub strate
GBGB55721 1970-11-24
GBGB5484 1971-02-25
GB548471 1971-02-25

Publications (1)

Publication Number Publication Date
AU3588571A true AU3588571A (en) 1973-05-24

Family

ID=26239922

Family Applications (1)

Application Number Title Priority Date Filing Date
AU35885/71A Expired AU3588571A (en) 1970-11-24 1971-11-18 A method of electrically connecting a semiconductor chip toa substrate

Country Status (4)

Country Link
AU (1) AU3588571A (en)
DE (1) DE2157956A1 (en)
FR (1) FR2115393A1 (en)
IT (1) IT945066B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3997910A (en) * 1975-02-26 1976-12-14 Rca Corporation Semiconductor device with solder conductive paths
DE2704833C2 (en) * 1977-02-05 1982-05-27 Robert Bosch Gmbh, 7000 Stuttgart Conductor track end area for soldering a semiconductor element using flip-chip technology

Also Published As

Publication number Publication date
DE2157956A1 (en) 1972-05-31
FR2115393A1 (en) 1972-07-07
IT945066B (en) 1973-05-10

Similar Documents

Publication Publication Date Title
CA992220A (en) Method of semiconductor chip separation
CA933676A (en) Method of manufacturing a semiconductor device
AU455243B1 (en) Method of manufacturing a semiconductor device
CA970079A (en) Method of soldering a semiconductor plate
AU3588571A (en) A method of electrically connecting a semiconductor chip toa substrate
AU449322B2 (en) A method of electrically connecting a semiconductor chip toa substrate
AU3716371A (en) A method of electrically connecting a semiconductor chip toa substrate
AU466371B2 (en) Device for mechanically and/or electrically connecting a semiconductor device toa substrate
CA918304A (en) Method of manufacturing a semiconductor device
CA933677A (en) Method of manufacturing a semiconductor device
CA970257A (en) Insulating layer on a semiconductor substrate
CA858502A (en) Method of manufacturing semiconductor devices
CA838347A (en) Method of manufacturing semiconductor devices
AU456634B2 (en) A method of manufacturing semiconductor devices
CA837796A (en) Method of forming leads on semiconductor devices
CA928870A (en) Method of manufacturing a semiconductor device
AU459262B2 (en) Method of manufacturing a semiconductor device
CA918302A (en) Method of manufacturing a semiconductor device
CA876995A (en) Alternated orientation of chips on semiconductor wafers
AU2842071A (en) A method of manufacturing semiconductor devices
CA838350A (en) Methods of manufacturing semiconductor devices
AU2498371A (en) Method of manufacturing a semiconductor device
CA837797A (en) Method of producing semiconductor devices having connecting leads attached thereto
AU435515B2 (en) Method of manufacturing a semiconductor device
CA884039A (en) Manufacturing method of semiconductor device