AU3128897A - Triple modular redundant computer system - Google Patents

Triple modular redundant computer system

Info

Publication number
AU3128897A
AU3128897A AU31288/97A AU3128897A AU3128897A AU 3128897 A AU3128897 A AU 3128897A AU 31288/97 A AU31288/97 A AU 31288/97A AU 3128897 A AU3128897 A AU 3128897A AU 3128897 A AU3128897 A AU 3128897A
Authority
AU
Australia
Prior art keywords
computer system
redundant computer
triple modular
modular redundant
triple
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU31288/97A
Other languages
English (en)
Inventor
Donald C. Lundell
Jonathan K. Lundell
James L. Petivan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Resilience Corp
Original Assignee
Resilience Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Resilience Corp filed Critical Resilience Corp
Publication of AU3128897A publication Critical patent/AU3128897A/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/181—Eliminating the failing redundant component
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/182—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits based on mutual exchange of the output between redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187—Voting techniques
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
AU31288/97A 1996-05-16 1997-05-15 Triple modular redundant computer system Abandoned AU3128897A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US1720196P 1996-05-16 1996-05-16
US60017201 1996-05-16
PCT/US1997/008320 WO1997043712A2 (en) 1996-05-16 1997-05-15 Triple modular redundant computer system

Publications (1)

Publication Number Publication Date
AU3128897A true AU3128897A (en) 1997-12-05

Family

ID=21781294

Family Applications (1)

Application Number Title Priority Date Filing Date
AU31288/97A Abandoned AU3128897A (en) 1996-05-16 1997-05-15 Triple modular redundant computer system

Country Status (3)

Country Link
AU (1) AU3128897A (enrdf_load_stackoverflow)
TW (1) TW320701B (enrdf_load_stackoverflow)
WO (1) WO1997043712A2 (enrdf_load_stackoverflow)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6141718A (en) * 1998-06-15 2000-10-31 Sun Microsystems, Inc. Processor bridge with dissimilar data registers which is operable to disregard data differences for dissimilar data direct memory accesses
US6148348A (en) * 1998-06-15 2000-11-14 Sun Microsystems, Inc. Bridge interfacing two processing sets operating in a lockstep mode and having a posted write buffer storing write operations upon detection of a lockstep error
US6587961B1 (en) * 1998-06-15 2003-07-01 Sun Microsystems, Inc. Multi-processor system bridge with controlled access
US6260159B1 (en) * 1998-06-15 2001-07-10 Sun Microsystems, Inc. Tracking memory page modification in a bridge for a multi-processor system
DE19844562B4 (de) * 1998-09-29 2006-06-01 Dr. Johannes Heidenhain Gmbh Verfahren zur sicheren Überwachung von Taktraten in einem redundanten System
JP3349983B2 (ja) * 1999-05-14 2002-11-25 エヌイーシーマイクロシステム株式会社 半導体集積回路装置
DE10023166A1 (de) * 2000-05-11 2001-11-15 Alcatel Sa Mehrrechner-System
FR2819598B1 (fr) 2001-01-16 2003-04-11 Thomson Csf Dispositif de synchronisation tolerant aux pannes pour reseau informatique temps reel
US7725618B2 (en) * 2004-07-29 2010-05-25 International Business Machines Corporation Memory barriers primitives in an asymmetric heterogeneous multiprocessor environment
US10353767B2 (en) * 2017-09-14 2019-07-16 Bae Systems Controls Inc. Use of multicore processor to mitigate common mode computing faults

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
ATE110477T1 (de) * 1990-08-14 1994-09-15 Siemens Ag Mehrrechnersystem hoher sicherheit mit drei rechnern.
JPH05204692A (ja) * 1992-01-30 1993-08-13 Nec Corp 情報処理装置の故障検出・切離方式
JPH06250867A (ja) * 1993-03-01 1994-09-09 Nippon Telegr & Teleph Corp <Ntt> 耐故障計算機および耐故障計算処理方法

Also Published As

Publication number Publication date
WO1997043712A2 (en) 1997-11-20
WO1997043712A3 (en) 1998-05-14
TW320701B (enrdf_load_stackoverflow) 1997-11-21

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