AU2007227418A1 - Spintronic devices with constrained spintronic dopant and associated methods - Google Patents
Spintronic devices with constrained spintronic dopant and associated methods Download PDFInfo
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- AU2007227418A1 AU2007227418A1 AU2007227418A AU2007227418A AU2007227418A1 AU 2007227418 A1 AU2007227418 A1 AU 2007227418A1 AU 2007227418 A AU2007227418 A AU 2007227418A AU 2007227418 A AU2007227418 A AU 2007227418A AU 2007227418 A1 AU2007227418 A1 AU 2007227418A1
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- 239000002019 doping agent Substances 0.000 title claims description 55
- 238000000034 method Methods 0.000 title claims description 29
- 239000004065 semiconductor Substances 0.000 claims description 133
- 239000002356 single layer Substances 0.000 claims description 35
- 239000013078 crystal Substances 0.000 claims description 32
- 239000011572 manganese Substances 0.000 claims description 22
- 239000010410 layer Substances 0.000 claims description 19
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 16
- 239000001301 oxygen Substances 0.000 claims description 16
- 229910052760 oxygen Inorganic materials 0.000 claims description 16
- 229910052761 rare earth metal Inorganic materials 0.000 claims description 13
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 12
- 229910052723 transition metal Inorganic materials 0.000 claims description 12
- 150000003624 transition metals Chemical class 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 8
- 150000002910 rare earth metals Chemical class 0.000 claims description 7
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 claims description 6
- NINIDFKCEFEMDL-UHFFFAOYSA-N Sulfur Chemical compound [S] NINIDFKCEFEMDL-UHFFFAOYSA-N 0.000 claims description 6
- 239000005864 Sulphur Substances 0.000 claims description 6
- 239000011737 fluorine Substances 0.000 claims description 6
- 229910052731 fluorine Inorganic materials 0.000 claims description 6
- 229910052747 lanthanoid Inorganic materials 0.000 claims description 6
- CSJDCSCTVDEHRN-UHFFFAOYSA-N methane;molecular oxygen Chemical compound C.O=O CSJDCSCTVDEHRN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052757 nitrogen Inorganic materials 0.000 claims description 6
- 230000005669 field effect Effects 0.000 claims description 5
- 229910052742 iron Inorganic materials 0.000 claims description 5
- -1 rare earth lanthanide Chemical class 0.000 claims description 5
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 4
- 125000006850 spacer group Chemical group 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 3
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 claims description 3
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 claims 2
- 229910052748 manganese Inorganic materials 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 18
- 239000000463 material Substances 0.000 description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 230000005294 ferromagnetic effect Effects 0.000 description 8
- 125000004429 atom Chemical group 0.000 description 6
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 5
- 239000000696 magnetic material Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 125000004430 oxygen atom Chemical group O* 0.000 description 5
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005291 magnetic effect Effects 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 230000010287 polarization Effects 0.000 description 2
- 238000001556 precipitation Methods 0.000 description 2
- 239000002096 quantum dot Substances 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 229910002546 FeCo Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- 229910001030 Iron–nickel alloy Inorganic materials 0.000 description 1
- 229910018663 Mn O Inorganic materials 0.000 description 1
- 229910003176 Mn-O Inorganic materials 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 150000002602 lanthanoids Chemical class 0.000 description 1
- 230000005302 magnetic ordering Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000001376 precipitating effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- WGPCGCOKHWGKJJ-UHFFFAOYSA-N sulfanylidenezinc Chemical compound [Zn]=S WGPCGCOKHWGKJJ-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
- 229910052984 zinc sulfide Inorganic materials 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
- H01L29/158—Structures without potential periodicity in a direction perpendicular to a major surface of the substrate, i.e. vertical direction, e.g. lateral superlattices, lateral surface superlattices [LSS]
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y25/00—Nanomagnetism, e.g. magnetoimpedance, anisotropic magnetoresistance, giant magnetoresistance or tunneling magnetoresistance
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F1/00—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties
- H01F1/01—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials
- H01F1/40—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials of magnetic semiconductor materials, e.g. CdCr2S4
- H01F1/401—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials of magnetic semiconductor materials, e.g. CdCr2S4 diluted
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F1/00—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties
- H01F1/01—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials
- H01F1/40—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials of magnetic semiconductor materials, e.g. CdCr2S4
- H01F1/401—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials of magnetic semiconductor materials, e.g. CdCr2S4 diluted
- H01F1/405—Magnets or magnetic bodies characterised by the magnetic materials therefor; Selection of materials for their magnetic properties of inorganic materials of magnetic semiconductor materials, e.g. CdCr2S4 diluted of IV type, e.g. Ge1-xMnx
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/3213—Exchange coupling of magnetic semiconductor multilayers, e.g. MnSe/ZnSe superlattices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/32—Spin-exchange-coupled multilayers, e.g. nanostructured superlattices
- H01F10/324—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer
- H01F10/3268—Exchange coupling of magnetic film pairs via a very thin non-magnetic spacer, e.g. by exchange with conduction electrons of the spacer the exchange coupling being asymmetric, e.g. by use of additional pinning, by using antiferromagnetic or ferromagnetic coupling interface, i.e. so-called spin-valve [SV] structure, e.g. NiFe/Cu/NiFe/FeMn
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/14—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates
- H01F41/30—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE]
- H01F41/302—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying magnetic films to substrates for applying nanostructures, e.g. by molecular beam epitaxy [MBE] for applying spin-exchange-coupled multilayers, e.g. nanostructured superlattices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
- H01L29/151—Compositional structures
- H01L29/152—Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66984—Devices using spin polarized carriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F10/00—Thin magnetic films, e.g. of one-domain structure
- H01F10/08—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers
- H01F10/10—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers characterised by the composition
- H01F10/18—Thin magnetic films, e.g. of one-domain structure characterised by magnetic layers characterised by the composition being compounds
- H01F10/193—Magnetic semiconductor compounds
Description
WO 2007/109231 PCT/US2007/006814 SPINTRONIC DEVICES WITH CONSTRAINED SPINTRONIC DOPANT AND ASSOCIATED METHODS Field of the Invention [0001] The present invention relates to the field of electronics, and, more particularly, to the field of spin based electronics and associated methods. Background of the Invention [0002] Spin-based electronics or spintronics exploit both the charge of electrons as well as the spin of the electrons to permit new devices with enhanced functions, higher speeds, and/or reduced.power consumption, for example. An exemplary spintronic device is the spin valve as illustrated in the FIGS. 1A and 1B. The spin valve 11 provides a low resistance when the spins are aligned (FIG. 1A), and provides a high resistance with the spins not aligned (FIG. 1B). The spin valve 11 may be used as a nonvolatile memory element, for example. Other exemplary spintronic devices including the spin-FET 12 schematically illustrated in FIG. 2, and the quantum bit device 13 illustrated in FIG. 3. [0003] Published U.S. Patent Application No. 2006/0018816, for example, discloses a Diluted Magnetic Semiconductor (DMS) comprising zinc oxide which includes a transition element or a rare earth lanthanide, or both, in an amount sufficient to change the material from non magnetic state to a room temperature ferromagnetic state. The material may be in a bulk form or a thin film form. A DMS material is a semiconductor in which transition metal 1 WO 2007/109231 PCT/US2007/006814 ions or r-are earth lanthanides substitute cations of host semiconductor materials. More particularly, a DMS material 15 is schematically illustrated in FIG. 4B, while to the left in FIG. 4A is a magnetic material 14, and to the right in FIG. 4C is a non-magnetic material 16. [0004] Published U.S. Patent Application No. 2005/0258416 discloses a spintronic switching device comprising a half-metal region between first and second conductive regions. The half-metal region comprises a material that, at the intrinsic Fermi level, has substantially zero available electronic states in a minority spin channel. Changing the voltage of the half metal region with respect to the first conducting region moves its Fermi level with respect to the electron energy bands of the first conducting region, which changes the number of available electronic states in the majority spin channel. In doing so, this changes the majority spin polarized current passing through the switching device. The half-metal region may comprise CrAs and the conducting regions may comprise a p-doped or n-doped semiconductor. For example, the p-doped semiconductor may comprise Mn doped GaAs. [0005] Published U.S. Patent Application No. 2004/0178460 discloses a spintronic device application as a memory and a logic device using a spin valve effect obtained by injecting a carrier spin-polarized from a ferromagnetic into a semiconductor at room temperature, and a spin-polarized field effect transistor. The ferromagnet is disclosed as one of a Fe, Co, Ni, FeCo, NiFe, GaMnAs, InMnAs, GeMn, and GaMnN, and can be a half metal having a spin polarization of 100% such as Cr0 2 . The semiconductor may be one selected from Si, GaAs, InAs, and Ge. Also, the WO 2007/109231 PCT/US2007/006814 spin channel region is disclosed as Si on insulator (SOI) or a two-dimensional electron gas of a compound semiconductor. [0006] An article to Jonker et al. "Electrical Spin Injection and Transport in Semiconductor Spintronic Devices", MRS Bulletin/Oct. 2003, pp. 740-748, discloses semiconductor heterostructures that use carrier spin as a new degree of freedom. The article discloses four essential requirements for implementing a semiconductor spintronics technology in devices, and provides that the efficient electrical injection of spin-polarized carriers into the semiconductor has been a critical issue severely hampering progress in this field. The article further discloses that advances in materials quality have increased the Curie temperature of Gal-,MnxAs to -150*K with the potential of exceeding room temperature. Spin-dependent resonant tunneling is identified as able to increase the spin selectivity of tunneling contacts in a very efficient way. A double-barrier heterojunction (DBH) comprising a nonmagnetic semiconductor quantum well between two insulating barriers and two ferromagnetic semiconductive electrodes may behave as half-metallic junctions if the parameters of the quantum well and barrier are properly tuned. [0007] Current spintronics technology is limited by the currently used materials. For example, it is important, as noted by Jonker et al., to have efficient spin carrier injection. It is also desirable to have manufacturing and operational compatibility with existing semiconductor processing technology. It is also desirable that the magnetic ordering or Curie temperature by at or near room temperature, instead of the more typical 100-200*K. One WO 2007/109231 PCT/US2007/006814 potential approach is the DMS materials as disclosed in the above noted U.S. Patent Application No. 2004/0178460. [0008] Another spintronic device structure is the Digital Ferromagnetic Heterostructure (DFH) as disclosed, for example, by Sanvito et al. in an article "Ab Initio Transport Theory for Digital Ferromagnetic Heterostructures" in Physical Review Letters, Vol. 87, No. 26, December 24, 2001, pp. 1-4. The article notes that the solubility limit of Mn in GaAs is rather small; however, a large MN concentration can be obtained in a zinc blende MnAs submonolayers into GaAs to form a MnAs/GaAs superlattice. A schematic diagram of a prior art DFH structure 18 is shown in FIG. 5 with a transition metal (Tm) in the form of Mn within a Silicon superlattice. Although this may have a large spin polarization at the Fermi level and a large magnetoresistance effect and Curie temperature higher than in the bulk, it may suffer from a low thermal stability. [0009] Unfortunately, many of the materials and structures for spintronic devices have relatively low concentrations of the spintronic dopant, such as Mn. The spintronic dopant tends to precipitate out of the crystal lattice, especially as the concentration is increased, and/or the device is subjected to thermal processing steps. Summyar of the Invention [0010] In view of the foregoing background, it is therefore an object of the present invention to provide a spintronic device that is readily manufactured and which exhibits good spintronic characteristics, such as at room temperature or higher, for example. 4 WO 2007/109231 PCT/US2007/006814 [0011] This and other objects, features and advantages in accordance with the present invention are provided by a spintronic device comprising at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice comprising a plurality of groups of layers. Each group of layers may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. Moreover, the spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. Accordingly, a fairly high spintronic dopant concentration may be achieved and maintained while reducing a likelihood of precipitation of the spintronic dopant. [0012] The spintronic dopant may comprise at least one spintronic dopant monolayer-adjacent the at least one non semiconductor monolayer. This may be so, for example, where the energy levels favor attraction and retention of the spintronic dopant to the non-semiconductor. The spintronic dopant may comprises a transition metal, such as at least one of Manganese, Iron, and Chromium. Alternatively or additionally the spintronic dopant may comprise a rare earth, such as a rare earth lanthanide, for example. [0013] The non-semiconductor may comprise at least one of Oxygen, Nitrogen, Fluorine, Carbon-Oxygen, and Sulphur, for example. The semiconductor may comprise Silicon, or more generally, may comprise a semiconductor selected from the group comprising Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors. The WO 2007/109231 PCT/US2007/006814 specific materials and structural configurations may be preferably selected so that the superlattice exhibits a Curie temperature of at least as high as room temperature. [0014] An embodiment of the spintronic device may be a spintronic field effect transistor. Accordingly, the spintronic FET may include a substrate carrying a pair of superlattices in spaced apart relation to define a source and a drain, with a channel between the source and drain, and a gate adjacent the channel. Another embodiment of the spintronic device is a spin valve. The spin valve may also include a substrate carrying a pair of superlattices in spaced apart relation with a spacer between the pair of superlattices. [0015] In some embodiments the repeating structure of a superlattice may not be needed. In other words, the spintronic device may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non semiconductor monolayer constrained within the crystal lattice, and a spintronic dopant constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. In addition, the device may also include an electrical contact coupled to the base semiconductor portion. [0016] A method aspect is for making a spintronic device comprising forming at least one superlattice and forming at least one electrical contact coupled thereto, with the at least one superlattice comprising a plurality of groups of layers. Each group of layers may comprise a plurality of stacked base -semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the 6 WO 2007/109231 PCT/US2007/006814 crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. Moreover, the spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. Other method aspects will also be understood by those skilled in the art based on the teachings herein. Brief Description of the Drawings [0017] FIG. lA is a schematic diagram of a spin valve as is in the prior art illustrated in a low resistance state. [0018] FIG. 1B is a schematic diagram of the prior art spin valve as shown in FIG. 1A illustrated in a high resistance state. [0019] FIG. 2 is a schematic perspective view of a spin FET as in the prior art. [0020] FIG. 3 is a schematic diagram of a quantum bit device as in the prior art. [0021] FIG. 4A is a schematic diagram of a magnetic material as in the prior art. [0022] FIG. 4B is a schematic diagram of a dilute magnetic material as in the prior art. [0023] FIG. 4C is a schematic diagram of a non-magnetic material as in the prior art. [0024] FIG. 5 is a schematic atomic diagram for a Digital Ferromagnetic Heterostructure (DFH) as in the prior art. [0025] FIGS. 6A and 6B are, respectively, a schematic diagram and energy level diagram for a DFH in accordance with the invention. [0026] FIG. 7 is a schematic atomic diagram for a DFH structure in accordance with the invention.
WO 2007/109231 PCT/US2007/006814 [0027] FIG. 8 is a schematic atomic model of a portion of a superlattice for a spintronic device in accordance with the present invention. [0028] FIG. 9 is a combined energy diagram for the superlattice as shown in FIG. 8. [0029] FIGS. 10A-10C are schematic atomic diagrams of various relative atomic positions of Si, 0, and Mn in a spintronic device in accordance with the invention. [0030] FIG. 11 is a schematic cross-sectional diagram of a spintronic FET in accordance with the invention. [0031] FIG. 12 is a schematic cross-sectional diagram of a spin valve in accordance with the invention. Detailed Description of the Preferred Embodiments [0032] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer, to like elements throughout. [0033] Referring now to FIGS. 6A and 6B, a first example of the present invention is now described. In the schematically illustrated DFH structure 20 of FIG. 6A, Oxygen is included in the Si superlattice also including a transition metal, such as Mn. As can be seen in the energy level diagram 21 of FIG. 6B, the Mn will have lower energy as it approaches the Oxygen layer. In other words, when the Mn atoms stick to the Silicon atoms, the structure is most energetically favorable, and the Mn atoms can be well 8 WO 2007/109231 PCT/US2007/006814 positioned and confined in the Silicon. As will be appreciated by those skilled in the art, the relative positioning of the Mn atoms with respect to the Oxygen atoms may be used to tune the Curie temperature (Tc), for example. The Tc may be much higher than room temperature for a 2D confined system, for example. The DFH structure 20 with Oxygen is advantageously more thermally stable than prior art structures. [0034] Mn, for example, substitutionally introduces only a small stress into the Silicon monocrystalline structure. Mn is an example of a transition metal suitable for spintronic devices. Those of skill in the art will appreciate that other materials may be used as well, such as, for example, Fe, Cr, etc. Rare earth elements may also be used, such as rare earth lanthanides. [0035] Other materials may also be used in place of or in combination with Oxygen. For example, Nitrogen, Fluorine, Carbon-Oxygen, and Sulphur are suitable materials. In addition, the base semiconductor illustratively in the form of Si, may be a semiconductor selected from the group comprising Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors. Of course, and the term Group IV semiconductors also includes Group IV-IV semiconductors. [0036] The charge and spin densities of various layers of a DFH structure 22 and incorporating Oxygen along with Mn in an Si monocrystalline superlattice is schematically illustrated in FIG. 7. Layer 1 is shown to be in a conductive state, in contrast to the other layers, Layers 6 and 16. [0037] A schematic atomic model 25 is shown in FIG. 8, with the transition metal (e.g. Mn) incorporated in the WO 2007/109231 PCT/US2007/006814 Silicon lattice along with Oxygen. With reference to FIG. 9, the spin-up energy states 27 (top) and the spin-down energy states 28 (bottom) are shown. The spin-up energy diagram 27 indicates that current will flow because of the low energy states at the Fermi level as will be appreciated by those skilled in the art, and in contrast to the high energy states at the Fermi level for the spin-down diagram 28. [0038] Referring now additionally to FIGS. 1OA-10C the relative energetics of various Si-Mn-O structures are schematically illustrated. More particularly, the structure 31 shown in FIG. 10A with an Oxygen atom between adjacent Mn atoms offers the lowest stability, the structure 32 shown in FIG. 10B with an Oxygen atom remote from a pair of Mn atoms offers an intermediate stability, and the structure 33 shown in FIG. 10C with an Oxygen atom tied to one of a pair of Mn atoms offers the highest relative stability. [0039] In some embodiments, the spintronic device may comprise at least one superlattice and at least one electrical contact coupled thereto, with the at least one superlattice comprising a plurality of groups of layers. Each group of layers may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. The base semiconductor portion may comprise 5 o 30 monolayers, for example. The spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non semiconductor monolayer as described above. Accordingly, a I r WO 2007/109231 PCT/US2007/006814 relatively high spintronic dopant concentration may be achieved and maintained while reducing a likelihood of precipitation of the spintronic dopant. For example, the concentration of the spintronic dopant may be in the range of from about 0.1 to 10 percent. [0040] The spintronic dopant may comprise at least one spintronic dopant monolayer adjacent the at least one non semiconductor monolayer. This may be so, for example, where the energy levels favor attraction and retention of the spintronic dopant to the non-semiconductor. [0041] Further details regarding superlattice structures including Silicon and Oxygen to achieve energy band modifications, such as to increase charge carrier mobility, are described in commonly assigned U.S. Patent Nos. 6,891,188 and 7,153,763, for example, the entire contents of which are incorporated herein by reference. In accordance with the spintronic devices described herein, Applicants theorize without wishing to be bound thereto that the non-semiconductor monolayer(s) may serve to collect or at least contain the spintronic dopant to keep the dopant from precipitating out, especially during any subsequent thermal processing steps as will be appreciated by those skilled in the art. In some embodiments, the spintronic dopant may be added by atomic layer deposition. In other embodiments, the spintronic dopant may be added by implantation and optionally followed by an anneal, for example, while the non-semiconductor monolayer(s) serves to at least contain the dopant. [0042] The non-semiconductor monolayer may be initially formed in a non-continuous fashion, that is, without all available positions for Oxygen being filled in the Silicon lattice, for example. Moreover, Applicants also theorize 11 WO 2007/109231 PCT/US2007/006814 without wishing to be bound thereto that Atomic Layer Deposition (ALD) of the monolayers may tend to form clusters on an atomic level rather than clearly or precisely defined monolayers, especially when subjected to subsequent thermal processes. For example, the superlattices in some cases may be formed before shallow trench isolation (STI) formation, and are thus subjected to thermal processing during STI formation. [0043] Accordingly, the term monolayer is intended to cover this theorized clustering phenomenon, and is not limited to a precise mathematical or atomic stick model layer as will be appreciated by those skilled in the art. It is also theorized by Applicants without their wishing to be bound thereto, that a clustering phenomenon may be considered to occur with the spintronic dopant, especially for the those combinations of materials, such as Si-O-Mn, where the Mn will be attracted to the 0. [0044] Extending the principles described herein further, in some embodiments the repeating structure of a superlattice may not be needed. In other words, the spintronic device may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non semiconductor monolayer constrained within the crystal lattice, and a spintronic dopant constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. The device may also include an electrical contact coupled to the base semiconductor portion. [0045] Referring now additionally to FIG. 11, an example of a spintronic device in the form of a spintronic field effect transistor (FET) 40 is now described. The WO 2007/109231 PCT/US2007/006814 spintronic FET 40 illustratively includes a semiconductor substrate 41 carrying a pair of superlattices in spaced apart relation to define a source*43 and a drain 44, with a channel 45 between the source and drain, and a gate 50 adjacent the channel. The gate 50 includes a dielectric layer 52 and a gate electrode or contact 51 thereon. [0046] For clarity of explanation the source 43 and drain 44 are illustrated with a plurality of horizontally extending lines schematically indicating the repeating groups of the superlattice and with dots indicative of the spintronic dopant. A source contact 46 and a drain contact 47 are illustratively coupled to the source 43 and drain 44 respectively. The channel 45 is illustratively in the form of a superlattice as well, but without the spintronic dopant. In other embodiments, the channel need not be a superlattice as will be appreciated by those skilled in the art. In yet other embodiments, only one of the source or drain may be a superlattice. [0047] Another embodiment of a spintronic device is the spin valve 60 explained with additional reference to FIG. 12. The spin valve 60 also includes a semiconductor substrate 61 that carries on its upper surface a pair of superlatices 62, 63 in spaced apart relation with a spacer 66 between the pair of superlattices. Respective electrical contacts 64, 65 are coupled to the superlattices 64, 65. As will be appreciated by those skilled in the art, one of the superlattices 64, 65 may be constructed to be pinned or be a hard ferromagnetic region, while the other is a soft ferromagnetic region. [0048] A method aspect is for making a spintronic device comprising forming at least one superlattice and forming at least one electrical contact coupled thereto, with the at WO 2007/109231 PCT/US2007/006814 least one superlattice comprising a plurality of groups of layers. Each group of layers may comprise a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant. Moreover, the spintronic dopant may be constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer. Other method aspects will also be understood by those skilled in the art based on the teachings herein. [0049] The spintronic devices described herein, including the spintronic FET and spin valve, may also be configured without the repeating structure of the superlattice as will be appreciated by those of skill in the art. The materials described herein may be used in many spintronic devices, particularly for increasing the injection efficiency of -spin carriers believed due to the material compatibility at the interface. The thermal stability of the devices may also be greatly enhanced believed due to the Oxygen being held in the crystal lattice, and the Mn being thermally stable adjacent the Oxygen atoms. Other general references in the field of spintronics include an article by Park et al. appearing in Science 295, 651 (2002); an article to Qian et al. in Phys. Rev. Lett. 96, 027211 (2006); and an article to Ohno et al. appearing in Nature 402, 790 (1999). [0050] In addition, many modifications and other embodiments of the invention will come to the mind of one skilled in the art having the benefit of the teachings presented in the foregoing descriptions and the associated drawings. Therefore, it is understood that the invention is WO 2007/109231 PCT/US2007/006814 not to be limited to the specific embodiments disclosed, and that modifications and embodiments are intended to be included within the scope of the invention.
Claims (42)
1. A spintronic device comprising: at least one superlattice; and at least one electrical contact coupled to said at least one superlattice; said at least one superlattice comprising a plurality of groups of layers with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant constrained within the crystal lattice of the base semiconductor portion by said at least one non-semiconductor monolayer.
2. The spintronic device according to Claim 1 wherein said spintronic dopant comprises at least one spintronic dopant monolayer adjacent said at least one non semiconductor monolayer.
3. The spintronic device according to Claim 1 wherein said spintronic dopant comprises a transition metal.
4. The spintronic device according to Claim 1 wherein said spintronic dopant comprises Manganese.
5. The spintronic device according to Claim 1 wherein said at least one transition metal comprises at least one of Manganese, Iron, and Chromium.
6. The spintronic device according to Claim 1 wherein said spintronic dopant comprises a rare earth. WO 2007/109231 PCT/US2007/006814
7. The spintronic device according to Claim 1 wherein said rare earth comprises a rare earth lanthanide.
8. The spintronic device according to Claim 1 wherein said non-semiconductor comprises Oxygen.
9. The spintronic device according to Claim 1 wherein said non-semiconductor comprises at least one of Oxygen, Nitrogen, Fluorine, Carbon-Oxygen, and Sulphur.
10. The spintronic device according to Claim 1 wherein said semiconductor comprises Silicon.
11. The spintronic device according to Claim 1 wherein said semiconductor comprises a semiconductor selected from the group comprising Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors.
12. The spintronic device according to Claim 1 wherein said at least one superlattice comprises a pair of superlattices; and further comprising: a substrate carrying said pair of superlattices in spaced apart relation to define a source and a drain; a channel between said source and drain; and a gate adjacent said channel so that said spintronic device defines a spintronic field effect transistor.
13. The spintronic device according to Claim 1 wherein said at least one superlattice comprises a pair of superlattices; and further comprising: a substrate carrying said pair of superlattices in spaced apart relation; and a spacer between said pair of superlattices so that said spintronic device defines a spintronic valve.
14. The spintronic device according to Claim 1 wherein said at least one superlattice exhibits a Curie temperature of at least as high as room temperature. 17 WO 2007/109231 PCT/US2007/006814
15. A spintronic device comprising: a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice; at least one non-semiconductor monolayer constrained within the crystal lattice; a spintronic dopant constrained within the crystal lattice of the base semiconductor portion by said at least one non-semiconductor monolayer; and an electrical contact coupled to said base semiconductor portion.
16. The spintronic device according to Claim 15 wherein said spintronic dopant comprises at least one spintronic dopant monolayer adjacent said at least one non semiconductor monolayer.
17. The spintronic device according to Claim 15 wherein said spintronic dopant comprises at least one of a transition metal and a rare earth.
18. The spintronic device according to Claim 15 wherein said non-semiconductor comprises at least one of Oxygen, Nitrogen, Fluorine, Carbon-Oxygen, and Sulphur.
19. The spintronic device according to Claim 15 wherein said semiconductor comprises a semiconductor selected from the group comprising Group IV semiconductors, Group III-V semiconductors, and Group-II-VI semiconductors.
20. The spintronic device according to Claim 15 further comprising a substrate carrying said base semiconductor portion.
21. The spintronic device according to Claim 15 wherein said base semiconductor portion exhibits a Curie temperature of at least as high as room temperature. 18 WO 2007/109231 PCT/US2007/006814
22. A method for making a spintronic device comprising: forming at least one superlattice; and forming at least one electrical contact coupled to the at least 'one superlattice; the at least one superlattice comprising a plurality.of groups of layers with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice, at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions, and a spintronic dopant constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer.
23. The method according to Claim 22 wherein the spintronic dopant comprises at least one spintronic dopant monolayer adjacent the at least one non-semiconductor monolayer.
24. The method according to Claim 22 wherein the spintronic dopant comprises a transition metal.
25. The method according to Claim 22 wherein the spintronic dopant comprises Manganese.
26. The method according to Claim 22 wherein the at least one transition metal comprises at least one of Manganese, Iron, and Chromium.
27. The method according to Claim 22 wherein the spintronic dopant comprises a rare earth.
28. The method according to Claim 22 wherein the rare earth comprises a rare earth lanthanide. 10 WO 2007/109231 PCT/US2007/006814
29. The method according to Claim 22 wherein the non-semiconductor comprises Oxygen.
30. The method according to Claim 22 wherein the non-semiconductor comprises at least one of Oxygen, Nitrogen, Fluorine, Carbon-Oxygen, and Sulphur.
31. The method according to Claim 22 wherein the semiconductor comprises Silicon.
32. The method according to Claim 22 wherein the semiconductor comprises a semiconductor selected from the group comprising Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors.
33. The method according to Claim 22 wherein forming the at least one superlattice comprises forming a pair of superlattices; and further comprising: providing a substrate carrying the pair of superlattices in spaced apart relation to define a source and a drain; forming a channel between the source and drain; and forming a gate adjacent the channel so that the spintronic device defines a spintronic field effect transistor.
34. The method according to Claim 22 wherein forming the at least one superlattice comprises forming a pair of superlattices; and further comprising: providing a substrate carrying the pair of superlattices in spaced apart relation; and forming a spacer between the pair of superlattices so that the spintronic device defines a spintronic valve. WO 2007/109231 PCT/US2007/006814
35. The method according to Claim 22 wherein the at least one superlattice exhibits a Curie temperature of at least as high as room temperature.
36. A method for making spintronic device comprising: forming a plurality of stacked base semiconductor monolayers defining a base semiconductor portion having a crystal lattice; forming at least one non-semiconductor monolayer constrained within the crystal lattice; providing a spintronic dopant constrained within the crystal lattice of the base semiconductor portion by the at least one non-semiconductor monolayer; and forming an electrical contact coupled to the base semiconductor portion.
37. The method according to Claim 36 wherein the spintronic dopant comprises at least one spintronic dopant. monolayer adjacent the at least one non-semiconductor monolayer.
38. The method according to Claim 36 wherein the spintronic dopant comprises at least one of a transition metal and a rare earth.
39. The method according to Claim 36 wherein the non-semiconductor comprises at least one of Oxygen, Nitrogen, Fluorine, Carbon-Oxygen, and Sulphur.
40. The method according to Claim 36 wherein the semiconductor comprises a semiconductor selected from the group comprising Group IV semiconductors, Group III-V semiconductors, and Group II-VI semiconductors.
41. The method according to Claim 36 further comprising providing a substrate carrying the base semiconductor portion. WO 2007/109231 PCT/US2007/006814
42. The method according to Claim 36 wherein the base semiconductor portion exhibits a Curie temperature of at .least as high as room temperature. 22
Applications Claiming Priority (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US78359806P | 2006-03-17 | 2006-03-17 | |
| US60/783,598 | 2006-03-17 | ||
| US11/687,430 US7625767B2 (en) | 2006-03-17 | 2007-03-16 | Methods of making spintronic devices with constrained spintronic dopant |
| US11/687,422 US20080012004A1 (en) | 2006-03-17 | 2007-03-16 | Spintronic devices with constrained spintronic dopant |
| US11/687,422 | 2007-03-16 | ||
| US11/687,430 | 2007-03-16 | ||
| PCT/US2007/006814 WO2007109231A1 (en) | 2006-03-17 | 2007-03-19 | Spintronic devices with constrained spintronic dopant and associated methods |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| AU2007227418A1 true AU2007227418A1 (en) | 2007-09-27 |
Family
ID=38278899
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AU2007227418A Abandoned AU2007227418A1 (en) | 2006-03-17 | 2007-03-19 | Spintronic devices with constrained spintronic dopant and associated methods |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP2002481A1 (en) |
| JP (1) | JP2009530827A (en) |
| AU (1) | AU2007227418A1 (en) |
| CA (1) | CA2646325A1 (en) |
| WO (1) | WO2007109231A1 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6376337B1 (en) * | 1997-11-10 | 2002-04-23 | Nanodynamics, Inc. | Epitaxial SiOx barrier/insulation layer |
| KR100492482B1 (en) * | 2002-09-04 | 2005-06-03 | 한국과학기술연구원 | Room temperature ferromagnetic semiconductor grown by plasma enhanced molecular beam epitaxy and ferromagnetic semiconductor based device |
-
2007
- 2007-03-19 CA CA002646325A patent/CA2646325A1/en not_active Abandoned
- 2007-03-19 AU AU2007227418A patent/AU2007227418A1/en not_active Abandoned
- 2007-03-19 WO PCT/US2007/006814 patent/WO2007109231A1/en active Application Filing
- 2007-03-19 JP JP2009500529A patent/JP2009530827A/en active Pending
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| Publication number | Publication date |
|---|---|
| CA2646325A1 (en) | 2007-09-27 |
| WO2007109231A1 (en) | 2007-09-27 |
| JP2009530827A (en) | 2009-08-27 |
| EP2002481A1 (en) | 2008-12-17 |
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