KR101009726B1 - Spin transistor with enhanced spin injection efficiency - Google Patents

Abstract

The present invention relates to a spin transistor having a high spin injection efficiency from a ferromagnetic material to a semiconductor. A spin transistor according to the present invention includes a semiconductor substrate having a channel layer formed therein; A ferromagnetic source formed on the semiconductor substrate and injecting electrons spin-polarized into the channel layer; A ferromagnetic drain spaced from the source and formed on the semiconductor substrate for detecting spin of electrons passing through the channel layer; A gate electrode formed on the semiconductor substrate between the source and the drain to apply a gate voltage; And an MgO tunneling film or an organic tunneling film having crystallinity in a <100> direction formed between the ferromagnetic source / drain and the semiconductor substrate.

Spin transistor

Description

SPIN TRANSISTOR WITH ENHANCED SPIN INJECTION EFFICIENCY}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to spin transistors, and more particularly to spin transistors having high spin injection efficiency from ferromagnetic material to semiconductors.

The electrons have two physical properties, a negative charge and a spin that is the source of the magnetic properties. Currently, most semiconductor electronic devices obtain desired device characteristics by controlling only charge of these two characteristics. However, such conventional semiconductor electronic device technology is almost saturated, and it is expected that within the next few decades, the size of semiconductor devices will reach the silicon lattice constant, making it almost impossible to manufacture devices with substantially improved performance. Therefore, there is an urgent need for the development of new-generation next-generation electronic devices.

In response to these demands, spintronics, a new paradigm for developing electronic devices in consideration of spin freedom with the charge of electrons as a result of efforts to realize spin-dependent electron transport. In recent years, technology has attracted great attention in the scientific and technological world. Compared with the existing electronic devices, spin electronic devices have super fast and ultra low power characteristics along with non-volatility, which is inherent, and will lead the growth of next-generation electronic devices with the development of nanotechnology. It is expected.

One of the biggest concerns in spintronics research is to implement transistors for memory and logic, taking into account electron and spin degrees of freedom. It is possible to expect a change in resistance by connecting a semiconductor between two magnetic bodies and injecting spin-polarized electrons into a semiconductor channel, and controlling the direction of spin by applying a gate voltage while the spin-polarized electron moves through the semiconductor channel. Attention is focused on the realization of spin field effect transistors (also known as spin FETs). The concept of spin transistors has been studied since its publication in 1990 (see "Electronic analog of the electro-optic modulator", Applied Physics letter, vol. 56, 665, 1990).

However, due to the inherent difference in electrical conductivity between the magnetic metal and the semiconductor used for the injection and detection of spin-polarized electrons, only very low spin injection efficiency of less than 1% was obtained, which has led to many studies. Nevertheless, it was considered almost impossible to realize a spin transistor with practical performance. Research into spin injection into a paramagnetic metal having similar conductivity to that of a magnetic metal instead of a semiconductor has been conducted. Spin injection into a paramagnetic metal is caused by spin accumulation caused by an imbalance between spin up and spin down electrons in the paramagnetic metal. It has been reported to cause the same interesting phenomenon. Recently, there have been reports of successful spin injection into semiconductor channels such as InAs 2-DEG, GaAs, or Si, but interest in spin transistor development has been raised, but still shows low spin injection rates. In order to implement useful spin transistors, mechanisms such as spin injection rate improvement and gate control of spin must be fully operated. Among them, improvement of spin injection rate from ferromagnetic material to a semiconductor channel is particularly required.

An object of the present invention is to provide a high performance spin transistor having high spin injection efficiency from a ferromagnetic material to a semiconductor channel.

A spin transistor according to an aspect of the present invention includes a semiconductor substrate having a channel layer through which spin-polarized electrons pass; A ferromagnetic source formed on the semiconductor substrate and injecting electrons spin-polarized into the channel layer; A ferromagnetic drain spaced from the source and formed on the semiconductor substrate for detecting spin of electrons passing through the channel layer; A gate electrode formed on the semiconductor substrate between the source and the drain to apply a gate voltage; And an MgO tunneling film or an organic tunneling film having crystallinity in a <100> direction formed between the ferromagnetic source / drain and the semiconductor substrate.

According to an embodiment of the present invention, an MgO tunneling film having crystallinity in the <100> direction is disposed between the ferromagnetic source / drain and the semiconductor, and a lattice constant in the <100> direction of the MgO tunneling film is the MgO tunneling film. And the lattice matching between the adjacent semiconductor material and the semiconductor material may be adjusted to deviate from the equilibrium lattice constant value in the <100> direction. As a result, the coherent tunneling effect can be increased to increase the spin injection rate. The lattice constant in the <100> direction of the MgO tunneling film may be adjusted to be out of the equilibrium lattice constant value in the <100> direction by lattice matching between the MgO tunneling film and the ferromagnetic material adjacent thereto.

According to an embodiment of the present invention, the channel resistance of the spin transistor is controlled in accordance with the magnetization direction of the spin electrons arriving at the drain by adjusting an effective magnetic field generated by spin-orbit coupling through the gate voltage. Can be.

According to an embodiment of the invention, the source and drain are selected from the group consisting of Fe, Co, Ni, FeCo, NiFe, CoFeB, Gd, Tb, Dy, CrO ₂ , GaMnAs, InMnAs, GeMn, GaMnN and combinations thereof It can be formed of a material. The source and drain may have a structure in which ferromagnetic thin films and nonmagnetic thin films are alternately repeatedly stacked, and may be magnetic materials magnetized in a direction perpendicular to an upper surface of the channel layer.

According to an embodiment of the present invention, the channel layer may be formed of a semiconductor material selected from the group consisting of Si, Ge, GaAs, InAs, InSb, and combinations thereof. In addition, the channel layer may be formed of a semiconductor in a Si on insulator (SOI) structure or a two-dimensional electron gas layer or structure.

The organic tunneling layer may be formed of a material selected from Alq ₃ and pentacene. The organic tunneling layer may be disposed between the ferromagnetic source / drain and the semiconductor substrate to perform spin injection through tunneling.

According to an embodiment of the present invention, both the MgO tunneling film and the organic tunneling film having crystallinity in the <100> direction may be disposed between the ferromagnetic source / drain and the semiconductor. In this case, the tunneling films may be an organic tunneling film. The MgO tunneling film may be stacked in the order of the MgO tunneling film closer to the ferromagnetic material than the organic tunneling film, or the MgO tunneling film and the organic tunneling film in the order of the organic tunneling film closer to the ferromagnetic material than the MgO tunneling film.

According to an embodiment of the present invention, an MgO tunneling film having a crystallinity in a <100> direction is disposed between the ferromagnetic source / drain and the semiconductor, and a B (boron) intermediate layer between the source and drain and the MgO tunneling film. This can be formed. In order to increase the contact area between the source and drain and the semiconductor and to facilitate spin injection, a lower portion of the source and drain may be buried below the upper surface of the semiconductor substrate.

According to the present invention, the spin injection efficiency from the ferromagnetic material to the semiconductor channel can be increased by using a stack structure of ferromagnetic material / MgO tunneling film / semiconductor under the source and drain regions of the spin field effect transistor. In particular, by controlling the lattice constant of the MgO tunneling film by lattice matching of the MgO tunneling film / semiconductor or the ferromagnetic material / MgO tunneling film, the coherent tunneling effect of the MgO tunneling film is doubled, so that the conventional semiconductor / magnetic material is used for the Satkey contact ( Compared to the spin injection rate observed in the schottky contact, an improved spin injection rate can be obtained. In addition, by introducing a B intermediate layer before depositing ferromagnetic materials for the source and drain on the MgO tunneling film / semiconductor, it is possible to promote crystal growth of the ferromagnetic layer and to prevent diffusion of oxygen atoms from the MgO tunneling film to the adjacent layer. In addition, by using an organic tunneling film instead of the MgO tunneling film or together with the MgO tunneling film, the spin injection efficiency from the ferromagnetic material to the semiconductor channel can be improved.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below.

1 is a cross-sectional view showing a spin transistor according to an embodiment of the present invention. Referring to FIG. 1, the spin transistor 10 includes a semiconductor substrate 12 having a semiconductor channel layer 7, a ferromagnetic source 11 and a ferromagnetic drain 13 spaced apart from each other. During device operation, spin polarized electrons move through the semiconductor channel layer 7. The gate electrode 14 is disposed on the semiconductor substrate 12 between the source 11 and the drain 13. The gate electrode 14 is insulated from the semiconductor substrate 12 by a gate insulating film 15 such as SiO ₂ .

The basic operation of the spin transistor 10 can be described as follows, for example. Spin electrons parallel to the magnetization direction (eg, x-axis direction) of the source 11 from the ferromagnetic source 11 are injected into the semiconductor channel layer 7 and move through the semiconductor channel. At this time, when the gate voltage Vg is applied to the gate electrode 14 to change the potential in the z-axis direction, the effective magnetic field in the y-axis direction changes due to spin-orbit interaction. The effective magnetic field can control the direction of spin of electrons moving through the channel layer 7. In this manner, the spin direction of the electrons moving inside the semiconductor is controlled and the direction of the spin electrons eventually arriving at the ferromagnetic drain 13 is parallel to the magnetization direction of the drain 13 (for example, the x-axis direction). By antiparallel to (on-state), it is possible to implement a spin transistor with a high off-state. However, the present invention is not limited to the above-described transistor operation, and for example, the magnetization direction of the drain can be shifted for switching on / off, and the source / drain 11/13 may be free from spin electrons. The magnetization direction of can also be set in the effective magnetic field direction (y-axis direction). The source / drain 11/13 may be a (vertically magnetized) magnetic material having a magnetization direction perpendicular to the top surface of the semiconductor substrate 12.

An important technique for completing the spin transistor 10 of the present embodiment is related to the injection of spin electrons from the magnetic source 11 into the semiconductor, and the variation of the spin injection characteristics is very large depending on the interface characteristics. In the present embodiment, an MgO tunneling film is introduced by introducing a MgO thin film having a [100] (more broadly <100>) crystal orientation between the ferromagnetic material constituting the source 11 and the drain 13 and the interface of the semiconductor 12 having the channel. (23) is formed. As a result, spin injection efficiency is increased by coherent tunneling through the MgO tunneling film 23 during spin electron injection from the ferromagnetic material into the semiconductor. Preferably, the MgO tunneling film 23 has a thickness of 0.5 to 5 nm. As described later, an organic tunneling film such as Alq ₃ and pentacene may be used instead of the MgO tunneling film 23 or together with the MgO tunneling film (see FIGS. 8 and 9).

In addition, the lattice constant of the MgO tunneling film 23 is out of equilibrium through lattice matching between the MgO tunneling film 23 and the adjacent semiconductor layer 12 (or ferromagnetic crystals of adjacent sources / drains), thereby achieving a coherent tunneling effect. Maximization can further increase the spin injection efficiency from the ferromagnetic material to the semiconductor.

The ferromagnetic material forming the source 11 and the drain 13 is a magnetic metal having high spin polarization, and is selected from Fe, Co, Ni, FeCo, NiFe, CoFeB, GaMnAs, InMnAs, GeMn, GaMnN, and the like. One of the magnetic semiconductors may be selected, and a half metal having a spin polarization of 100%, such as CrO ₂ , may be used. In addition, the source 11 and the drain 13 may be formed of a rare earth metal such as Gd, Tb, or Dy or an alloy thereof. In addition, according to the embodiment, the source 11 and the drain 13 have a structure in which a ferromagnetic thin film and a nonmagnetic thin film are alternately stacked alternately (and have a magnetization direction perpendicular to the upper surface of the channel layer). It may be a magnetized magnetic material. In this stacked perpendicular magnetized magnetic material, the ferromagnetic thin film may be selected from the group consisting of CoFe, Co, Ni, NiFe, and combinations thereof, and the nonmagnetic thin film may be selected from the group consisting of Pd, Au, Pt, and combinations thereof. Can be.

The semiconductor channel layer 7 may use any one selected from Si, Ge, GaAs, InAs, and InSb. In addition, the channel layer 7 may be formed of a two-dimensional electron gas (2DEC) layer of a silicon on insulator (SOI) or a compound semiconductor. In this embodiment, for example, a spin injection element having a 2DEC interface structure of Fe (source and drain ferromagnetic material) / MgO (tunneling film) / InAs (semiconductor) can be used using a 2DEC semiconductor channel layer of InAs. .

The source 11 and the drain 13 may have a line width in the range of 5 to 1000 nm depending on the type of device to be applied, and the line widths are formed differently so that spin switching is antiparallel in a certain magnetic range by planar magnetic anisotropy. Can be. In another embodiment, the source 11 and the drain 13 may have perpendicular magnetic anisotropy and the spacing between the source 11 and the drain 13 is 10 nm in consideration of the spin diffusion length of the semiconductor channel. It can be set in the range of ˜10 μm.

As described above, in order to improve spin injection from a ferromagnetic material (especially a source) to a semiconductor (especially a channel layer), an MgO tunneling film having a crystallinity in the <100> direction between the ferromagnetic material and the semiconductor (for example, in a range of 0.5 to 5 nm). Spin injection by tunneling). At this time, the lattice constant of the MgO tunneling film 23 can be artificially controlled by lattice matching between the semiconductor and the ferromagnetic material, and the lattice constant of the MgO tunneling film 23 is increased or decreased more than the equilibrium lattice constant of 4.216 Å. In the case of the deviation, the tunneling efficiency through the MgO tunneling film 23 is further increased, thereby increasing the spin injection efficiency from the ferromagnetic material to the semiconductor.

In the spin transistor 10, the semiconductor surface is etched to a depth in the range of 10 to 500 nm in order to increase the contact surface between the semiconductor 12 and the ferromagnetic materials 11 and 13 and to facilitate spin injection, and then the source region. And drain regions are formed so that the lower portions of the source 11 and the drain 13 are buried below the upper surface of the semiconductor substrate 12 as shown in FIG. As a result, the upper portion of the semiconductor substrate 12 is recessed downward at the portion where the source and drain 11 and 13 are positioned. In addition, before depositing the ferromagnetic materials 11 and 13 on the MgO tunneling film 23, the B (boron) intermediate layer (see reference numeral 24 in FIG. 4) within 0.5 to 10 kW in order to promote surface planarization and crystallization of the ferromagnetic material. Can be deposited.

Fig. 2 is a schematic diagram for explaining the control of the lattice constant of the MgO tunneling film by lattice matching between the semiconductor and the MgO tunneling film in the lamination structure of the ferromagnetic material / MgO tunneling film / semiconductor. For example, InAs may be used as a semiconductor in lattice matching with the MgO tunneling film.

The MgO and InAs lattice structures shown in FIG. 2 are viewed from above (as viewed in the z-axis direction of FIG. 1), and the [100] direction (more broadly, the <100> direction) of MgO is the same as the [110] direction of InAs. Show a consistent decision relationship In an actual laminated structure, the InAs lattice structure shown in FIG. 2 is disposed below the MgO lattice structure. In this case, the lattice constant (4.302Å) of InAs in the [110] direction is about 2% larger than the equilibrium lattice constant (4.216O) in the [100] direction of MgO, so the MgO thin film is subjected to tensile stress by lattice matching. The lattice constant in the [100] direction of MgO increases.

If GaAs semiconductors are used instead of InAs, each layer should be placed so that the [100] direction of MgO (equilibrium lattice constant d ₁₀₀ = 4.216 Å) and the GaAs [110] direction (equilibrium lattice constant d ₁₁₀ = 3.996 Å) are parallel. In this case, since the lattice constant of the MgO thin film is about 5.2% larger than that of GaAs, the lattice constant is reduced from the equilibrium value due to compressive stress.

As described above, the lattice constant in the <100> direction of MgO can be increased or decreased through lattice matching with adjacent semiconductor materials, and thus the lattice constant in the (100) plane of the MgO thin film. By doubling the coherent tunneling effect, which is highly dependent on the MgO crystal direction and lattice constant value, the spin injection efficiency or spin injection polarization rate from the ferromagnetic material to the semiconductor can be significantly improved.

In order to verify the improvement of the electron spin injection efficiency by the MgO tunneling film in the <100> crystal direction forming the lattice match with the semiconductor, where the <100> direction is the (top) in-plane direction of the MgO tunneling film, FIG. Spin injection devices as shown in the drawings were fabricated, and various electrical and magnetic properties were measured (see FIGS. 5 to 7).

3 is a SEM (scanning electron microscope) photograph showing a plan view of a spin injection device for a spin transistor according to an embodiment of the present invention, prepared by inserting an MgO tunneling film between a ferromagnetic material and a semiconductor. In order to investigate only the possibility of improving the spin injection efficiency, the formation of the gate electrode and gate insulating films 14 and 15 of the spin transistor of FIG. 1 is omitted, and FIGS. 3 and 4 are provided with a semiconductor substrate having a source, a drain, and a channel. A spin injection device as shown in the figure was fabricated.

The vertically extending portions 31 and 32 in the SEM image of FIG. 3 are semiconductor mesa structures having an InAs-based two-dimensional electron gas (2DEC) layer formed by a photolithography process, and transport electrons (channel layers) of spin electrons. Corresponds to The source 11 and the drain 13 of the ferromagnetic Fe thin film having different widths are formed on the channel layers 31 and 32. Both ends of the source 11 and both ends of the drain 13 are provided with electrical connection pads 35, 36; 37, 38, for example, made of Ti / Au. The width of the channel layers 31 and 32 of the mesa structure may be, for example, about 8 μm, and the distance between the source and the drain (channel length) may be about 2.4 μm. By varying the shape (especially the width) of the source 11 and the drain 13, the coercive force of the two magnetic bodies (source and drain) can be different by using the magnetic shape anisotropy of the Fe thin film.

FIG. 4 (a) is a schematic view showing a partial cross section of the spin injection device for spin transistor of FIG. 3, and FIG. 4 (b) is a TEM (transmission electron microscope) photograph showing the stacked structure of the cross section. As shown in FIGS. 4A and 4B, the InAlAs layer 22 directly on the channel layer 7 of the InAs quantum well structure is etched to 5 to 10 nm directly above the channel layer 7 to reduce interfacial resistance. Thereafter, a [100] MgO tunneling film 23 having a thickness of about 2 nm and a B (boron) intermediate layer 24 having a thickness of about 1 nm are formed thereon, and an Fe ferromagnetic source and drain 11 and 13 having a thickness of about 16 nm thereon. To form a device. The InAlAs layer 22 is a semiconductor having a bandgap larger than the bandgap of InAs to form the channel layer 7 of the InAs quantum well structure. The TEM image of FIG. 4 (b) shows the lamination structure of the InAlAs 22, the [100] MgO tunneling film 23, the B intermediate layer 24, and the Fe ferromagnetic layer 11 or 13 of the spin element. Here, the B intermediate layer 24 serves as a diffusion barrier to help crystallize the Fe ferromagnetic materials 11 and 13 located on the MgO crystal 23 and prevent diffusion of oxygen from the MgO 23 to the adjacent layer.

FIG. 5 is a graph showing the current (J: more precise current density) -voltage (V) characteristics measured for the spin injection device of FIG. 3 to evaluate the characteristics of the MgO tunneling film introduced between the ferromagnetic source / drain and the semiconductor. to be. As shown in FIG. 5, the current gradually increases with the voltage, and this characteristic corresponds to the middle region between Schottky and Ohmic. This current (J) -voltage (V) characteristic does not show a great change depending on the thickness of the MgO tunneling film 23, while it tends to depend significantly on the etching depth of InAlAs.

6 is a graph showing the magnitude of the interface resistance according to the spin injection barrier width between the ferromagnetic materials 11 and 13 and the semiconductor channel layer 7 in the spin injection device of FIG. 3. This spin injection barrier width varies depending on the etching depth of the InAlAs layer 22 described in FIG. 4, but the larger the etching depth, the smaller the barrier width. In FIG. 6, the horizontal axis represents the above-described barrier width, and the vertical axis represents the interface resistance (R) × interface area (A). When the etching depth is about 25 nm and all InAlAs are removed to directly contact the InAs channel layer 7 and the MgO tunneling film 23, the horizontal barrier width becomes zero. Experiments at different etch depths (ie at various barrier widths) have shown that the thickness of the InAlAs (22) directly above the channel layer 7 (barrier width) of up to 7 nm has an R × A value of about 10 ² μs · μm ² or less. Although the value is low, the RxA value increases exponentially at a thickness greater than that, and has a very high RxA value of 10 ⁶ Pa · μm ² or more at a thickness of 30 nm or more. Therefore, when the thickness of InAlAs 22 directly on the channel layer 7 is within about 7 nm, it exhibits a low R x A value, which is advantageous for spin implantation through MgO coherence tunneling.

FIG. 7 is a graph illustrating a non-local measurement result of the spin injection device of FIG. 3, showing that spin is successfully injected into the semiconductor through the MgO tunneling layer 23. In this non-local measurement, a drain connection pad (drain terminal) is applied while applying a current of 1 mA at a temperature of 20 K from the source connection pad (source terminal) 36 in FIG. 3 to one end (semiconductor terminal) 31 of the semiconductor channel layer. The voltage between 38 and the other end (semiconductor terminal) 32 of the semiconductor channel layer was measured. The current between the source connection pad 36 and the semiconductor terminal 31 is the sum of the charge current and the spin current, and only the pure spin current is formed in the opposite semiconductor terminal 32, so that the potential change is caused by the semiconductor terminal. This is indicated by a change in the terminal voltage between 32 and the drain terminal 38. At this time, the external magnetic field was artificially applied, but the voltage was measured while increasing the magnetic field (sweep-up) and while decreasing the magnetic field (sweep-down). In order to measure pure spin current, this measurement method of measuring pure spin current by installing a voltage terminal outside a path through which an applied current flows is called non-local measurement.

The graph of FIG. 7 shows the change in spin resistance by dividing the voltage change (change in voltage between the semiconductor terminal 32 and the drain terminal 38) measured while applying a planar magnetic field in the longitudinal direction of the source and drain by the applied current. It is shown. More specifically, the horizontal axis of the graph of FIG. 7 represents an applied magnetic field (direction parallel or antiparallel to the ferromagnetic source and drain), and ΔR of the vertical axis represents a basic resistance value (R _base to -14 mΩ: magnetization of the source and drain). Spin resistance value when the directions are parallel) is obtained by subtracting the spin resistance value R in each of the applied magnetic fields.

3 and 7, when the magnetization directions of the source 11 and the drain 13 are parallel to each other, a very small basic resistance R _base close to zero is shown. Theoretically, since the charge current does not flow in the parallel section of the source 11 and the drain 13, the resistance should be zero, but the non-zero basic resistance value R _base is represented by the influence of the interface resistance.

As the applied magnetic field is changed by sweep up or sweep down, the coercive force of the drain 13 having a smaller coercivity than the source 11 (for reference, the coercivity can be changed by the shape magnetic anisotropy by changing the line width of the source and the drain). ) Magnetization reversal occurs so that the source 11 and the drain 13 become antiparallel in a constant magnetic range. In this antiparallel section, the accumulation of spin injected into the semiconductor occurs, resulting in a significant change in spin resistance, resulting in a distinct non-local spin injection signal. As shown in FIG. 7, a dip section (spin resistance change section) in which the resistance value is greatly decreased downward is clearly identified, and the dip section includes antiparallel sections (magnetism inversion sections) of the source 11 and drain. Matches exactly. This makes it possible to confirm a clear change in spin resistance due to the parallel or antiparallel relationship between the electron spin direction arriving at the drain 13 and the magnetization direction of the drain 13. Since the ferromagnetic material (source, drain) has hysteresis characteristics, the dip portion in the sweep up measurement and the dip portion in the sweep down measurement do not coincide with each other.

In Fig. 7, the ΔR (= R _base -R _antiparallel ) value in the deep section is about 3mΩ, which shows a very high resistance ratio of about 21% compared to the basic resistance, and the spin injection polarization rate is increased through the MgO tunneling layer. It can be seen that it is significantly improved. These results demonstrate that high spin injection polarization occurs by increasing the coherence tunneling effect through the MgO tunneling film in the <100> crystal direction.

In the above-described embodiment, the MgO tunneling film in the <100> crystal direction is used between the ferromagnetic material and the semiconductor to improve spin injection efficiency from the ferromagnetic material to the semiconductor channel. However, Alq ₃ and penta instead of the MgO film (or with MgO) are used. Organic tunneling films such as pentacene may also be used. This example is illustrated in FIGS. 8 and 9.

As shown in FIG. 8, an organic tunneling film 123 such as Alq ₃ and pentacene is disposed between the ferromagnetic source / drain 11 or 13 and the InAs semiconductor channel layer 7 instead of the MgO tunneling film. It is. The organic tunneling layer 123 is amorphous and has a spin coherence leng (maximum length that can be moved without spin relaxation while spin is polarized up or down). Unlike the membrane, it is very long, several micrometers, which doubles the spin tunneling effect. As shown in FIG. 9, a laminated structure of ferromagnetic materials 11 and 13 / MgO tunneling film 23 / organic tunneling film 123 / semiconductors 22 and 7 may be used. In the case of the embodiment of FIG. 9, the organic tunneling film 123 has a meaning to compensate for the coherence tunneling phenomenon of the <100> MgO tunneling film 23. In the embodiment of FIG. 9, an intermediate B layer may be further formed between the MgO tunneling layer 23 and the ferromagnetic bodies 11 and 13. Unlike the lamination order in FIG. 9, a lamination structure of ferromagnetic materials 11 and 13 / organic tunneling film 123 / MgO tunneling film 23 / semiconductors 22 and 7 may be used.

It is intended that the invention not be limited by the foregoing embodiments and the accompanying drawings, but rather by the claims appended hereto. In addition, it will be apparent to those skilled in the art that the present invention may be substituted, modified, and changed in various forms without departing from the technical spirit of the present invention described in the claims.

1 is a cross-sectional view showing a spin transistor according to an embodiment of the present invention.

Fig. 2 is a schematic diagram for explaining the control of the lattice constant of the MgO tunneling film by lattice matching between the semiconductor and the MgO tunneling film in the lamination structure of the ferromagnetic material / MgO tunneling film / semiconductor.

3 is a SEM (scanning electron microscope) photograph showing a plan view of a spin injection device for a spin transistor according to an embodiment of the present invention, prepared by inserting an MgO tunneling film between a ferromagnetic material and a semiconductor.

FIG. 4 (a) is a schematic cross-sectional view of a part of the spin injection device of FIG. 3, and FIG. 4 (b) is a TEM (transmission electron microscope) photograph showing a partial cross section.

FIG. 5 is a graph illustrating current-voltage characteristics measured for the spin injection device of FIG. 3.

FIG. 6 is a graph illustrating the magnitude of the interface resistance according to the spin injection barrier width between the ferromagnetic material and the semiconductor channel in the spin injection device of FIG. 3.

FIG. 7 is a graph illustrating a non-local measurement result of the spin injection device of FIG. 3.

8 and 9 are cross-sectional views illustrating a portion of a spin transistor structure according to other embodiments of the present invention.

<Description of the symbols for the main parts of the drawings>

7: channel layer 10: spin transistor

11: source 12: semiconductor substrate

13: drain 14: gate electrode

15: gate insulating film 23: MgO tunneling film

24: B (boron) intermediate layer 31: one end of the channel

32: other end of channel 35, 36: source connection pad

37, 38: drain connection pad 123: organic tunneling film

Claims (15)

A semiconductor substrate having a channel layer through which spin-polarized electrons pass; A ferromagnetic source formed on the semiconductor substrate and injecting electrons spin-polarized into the channel layer; A ferromagnetic drain spaced from the source and formed on the semiconductor substrate for detecting spin of electrons passing through the channel layer; A gate electrode formed on the semiconductor substrate between the source and the drain to apply a gate voltage; And And an MgO tunneling film or an organic tunneling film formed between the source / drain and the semiconductor substrate and having crystallinity in a <100> direction. The MgO tunneling film is a spin transistor, characterized in that the lattice constant in the <100> direction deviated from the equilibrium lattice constant value by lattice matching between the MgO tunneling film and the adjacent material. The method of claim 1, And wherein said adjacent material is a semiconductor material. The method of claim 1, And said adjacent material is a ferromagnetic material. The method of claim 1, And controlling the channel resistance of the spin transistor in accordance with the magnetization direction of the spin electrons arriving at the drain by adjusting the effective magnetic field generated by the spin orbit coupling through the gate voltage. The method of claim 1, The source and drain are formed of a material selected from the group consisting of Fe, Co, Ni, FeCo, NiFe, CoFeB, Gd, Tb, Dy, CrO ₂ , GaMnAs, InMnAs, GeMn, GaMnN, and combinations thereof transistor. The method of claim 1, And the source and the drain have a structure in which ferromagnetic thin films and nonmagnetic thin films are alternately repeatedly stacked, and are magnetized in a direction perpendicular to an upper surface of the channel layer. The method of claim 6, And the ferromagnetic thin film is selected from the group consisting of CoFe, Co, Ni, NiFe, and combinations thereof. The method of claim 6, And the nonmagnetic thin film is selected from the group consisting of Pd, Au, Pt, and combinations thereof. The method of claim 1, And the channel layer is formed of a semiconductor material selected from the group consisting of Si, Ge, GaAs, InAs, InSb, and combinations thereof. The method of claim 1, And the channel layer is formed of a semiconductor in an SOI structure or a two-dimensional electron gas layer. The method of claim 1, The organic tunneling layer is a spin transistor, characterized in that formed of a material selected from Alq ₃ and pentacene (pentacene). The method of claim 1, And a MgO tunneling film and an organic tunneling film having a crystallinity in a <100> direction between the ferromagnetic source / drain and the semiconductor. The method of claim 12, The MgO tunneling film is laminated on the organic tunneling film, or the organic tunneling film is laminated on the MgO tunneling film. The method of claim 1, And a MgO tunneling film having a crystallinity in a <100> direction between the ferromagnetic source / drain and the semiconductor, and further comprising a B (boron) intermediate layer formed between the source and drain and the MgO tunneling film. Spin transistor. The method of claim 1, And a lower portion of the source and drain is buried below an upper surface of the semiconductor substrate.

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