AU2003285971A1 - Transmission configuration for transmitting signals and d/a converter circuits therefor - Google Patents

Transmission configuration for transmitting signals and d/a converter circuits therefor

Info

Publication number
AU2003285971A1
AU2003285971A1 AU2003285971A AU2003285971A AU2003285971A1 AU 2003285971 A1 AU2003285971 A1 AU 2003285971A1 AU 2003285971 A AU2003285971 A AU 2003285971A AU 2003285971 A AU2003285971 A AU 2003285971A AU 2003285971 A1 AU2003285971 A1 AU 2003285971A1
Authority
AU
Australia
Prior art keywords
transmitting signals
transmission configuration
converter circuits
circuits therefor
therefor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003285971A
Other languages
English (en)
Inventor
Volker Schindler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of AU2003285971A1 publication Critical patent/AU2003285971A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/68—Digital/analogue converters with conversions of different sensitivity, i.e. one conversion relating to the more significant digital bits and another conversion to the less significant bits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H03M1/82—Digital/analogue converters with intermediate conversion to time interval
    • H03M1/822—Digital/analogue converters with intermediate conversion to time interval using pulse width modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M3/358—Continuously compensating for, or preventing, undesired influence of physical parameters of non-linear distortion, e.g. instability
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
    • H03M3/502—Details of the final digital/analogue conversion following the digital delta-sigma modulation
    • H03M3/506—Details of the final digital/analogue conversion following the digital delta-sigma modulation the final digital/analogue converter being constituted by a pulse width modulator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3024—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M7/3026—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
AU2003285971A 2002-11-29 2003-11-27 Transmission configuration for transmitting signals and d/a converter circuits therefor Abandoned AU2003285971A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
ATA1792/2002 2002-11-29
AT17922002A AT412309B (de) 2002-11-29 2002-11-29 Übertragungsanordnung zur übertragung von signalen und d/a-umsetzerschaltungen hiefür
PCT/AT2003/000355 WO2004051860A2 (de) 2002-11-29 2003-11-27 Übertragungsanordnung zur übertragung von signalen und d/a-umsetzerschaltungen hiefür

Publications (1)

Publication Number Publication Date
AU2003285971A1 true AU2003285971A1 (en) 2004-06-23

Family

ID=32234907

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003285971A Abandoned AU2003285971A1 (en) 2002-11-29 2003-11-27 Transmission configuration for transmitting signals and d/a converter circuits therefor

Country Status (4)

Country Link
AT (1) AT412309B (de)
AU (1) AU2003285971A1 (de)
DE (1) DE20380325U1 (de)
WO (1) WO2004051860A2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005052702B4 (de) 2005-11-04 2007-10-25 Infineon Technologies Ag Synchronisationsschaltung zur Synchronisation von PWM-Modulatoren
DE102006030774A1 (de) * 2006-06-30 2008-02-21 Endress + Hauser Conducta Gesellschaft für Mess- und Regeltechnik mbH + Co. KG Verfahren zur Bestimmung des Bürdenwiderstandes für einen Messumformer
DE102007004595A1 (de) 2007-01-30 2008-08-07 Samson Ag Verfahren und Einrichtung zum Übertragen von elektrischen Stellungsinformationen eines Stellglieds
DE102008017774B4 (de) 2008-04-08 2011-02-10 Austriamicrosystems Ag Modulationsanordnung und Verfahren zum Bereitstellen eines modulierten Steuersignals
DE102010043842A1 (de) * 2010-11-12 2012-05-16 Endress + Hauser Wetzer Gmbh + Co Kg Delta-Sigma-D/A-Wandler
DE102018201410B3 (de) 2018-01-30 2019-02-28 Siemens Aktiengesellschaft Demodulationsverfahren für C8PSK-Codierungen
US11546016B2 (en) * 2021-03-18 2023-01-03 Texas Instruments Incorporated Pseudo-sinusoidal waveform generator for HART communication

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5208594A (en) * 1991-05-02 1993-05-04 Ricoh Company, Ltd. Signal processor that uses a delta-sigma modulation
US5245333A (en) * 1991-09-25 1993-09-14 Rosemount Inc. Three wire low power transmitter
US5406284A (en) * 1992-12-31 1995-04-11 Monolith Technologies Corporation Methods and apparatus for the quantization and analog conversion of digital signals
US6249237B1 (en) * 1998-10-09 2001-06-19 Lsi Logic Corporation System and method for bandpass shaping in an oversampling converter
US6317067B1 (en) * 1998-12-04 2001-11-13 Philips Electronics North America Corporation Pulse density modulation based digital-to-analog conversion
JP4073676B2 (ja) * 2001-03-21 2008-04-09 株式会社リコー Ｄａ変換器及びｄａ変換方法

Also Published As

Publication number Publication date
ATA17922002A (de) 2004-05-15
WO2004051860A2 (de) 2004-06-17
DE20380325U1 (de) 2005-07-21
WO2004051860A3 (de) 2004-09-02
AT412309B (de) 2004-12-27

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase