AU2003248073A1 - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
AU2003248073A1
AU2003248073A1 AU2003248073A AU2003248073A AU2003248073A1 AU 2003248073 A1 AU2003248073 A1 AU 2003248073A1 AU 2003248073 A AU2003248073 A AU 2003248073A AU 2003248073 A AU2003248073 A AU 2003248073A AU 2003248073 A1 AU2003248073 A1 AU 2003248073A1
Authority
AU
Australia
Prior art keywords
integrated circuit
semiconductor integrated
semiconductor
circuit
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003248073A
Other versions
AU2003248073A8 (en
Inventor
Masayuki Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Innotech Corp
Original Assignee
INNOTECH CORP
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by INNOTECH CORP filed Critical INNOTECH CORP
Publication of AU2003248073A8 publication Critical patent/AU2003248073A8/en
Publication of AU2003248073A1 publication Critical patent/AU2003248073A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/1776—Structural details of configuration resources for memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
AU2003248073A 2003-07-16 2003-07-16 Semiconductor integrated circuit Abandoned AU2003248073A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2003/009030 WO2005008893A1 (en) 2003-07-16 2003-07-16 Semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
AU2003248073A8 AU2003248073A8 (en) 2005-02-04
AU2003248073A1 true AU2003248073A1 (en) 2005-02-04

Family

ID=34074100

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003248073A Abandoned AU2003248073A1 (en) 2003-07-16 2003-07-16 Semiconductor integrated circuit

Country Status (3)

Country Link
JP (1) JP4334541B2 (en)
AU (1) AU2003248073A1 (en)
WO (1) WO2005008893A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100883352B1 (en) 2006-11-21 2009-02-11 한국전자통신연구원 Method for expressing emotion and intention in remote interaction and Real emoticon system therefor
US9379713B2 (en) * 2014-01-17 2016-06-28 Semiconductor Energy Laboratory Co., Ltd. Data processing device and driving method thereof

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06276086A (en) * 1993-03-18 1994-09-30 Fuji Xerox Co Ltd Field programmable gate array
US5894565A (en) * 1996-05-20 1999-04-13 Atmel Corporation Field programmable gate array with distributed RAM and increased cell utilization
JP3471628B2 (en) * 1998-05-12 2003-12-02 日本電信電話株式会社 Rewriteable logic circuit and latch circuit
JP3471623B2 (en) * 1998-07-31 2003-12-02 日本電信電話株式会社 Rewriteable logic circuit
WO2000052753A1 (en) * 1999-03-04 2000-09-08 Hitachi, Ltd. Semiconductor integrated circuit and method for designing logic integrated circuit comprising the same
JP3517839B2 (en) * 2000-11-29 2004-04-12 日本電信電話株式会社 Programmable cell array circuit
JP3665962B2 (en) * 2000-12-20 2005-06-29 日本電信電話株式会社 Programmable logic cell array circuit and initialization method thereof
JP2003149300A (en) * 2001-11-16 2003-05-21 Hitachi Ltd Test method and semiconductor device
JP2003224468A (en) * 2002-01-31 2003-08-08 Hitachi Ltd Semiconductor integrated circuit, its manufacturing method, and testing method

Also Published As

Publication number Publication date
JPWO2005008893A1 (en) 2006-09-07
WO2005008893A8 (en) 2007-06-21
JP4334541B2 (en) 2009-09-30
AU2003248073A8 (en) 2005-02-04
WO2005008893A1 (en) 2005-01-27

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase