AU2002359950A1 - Plasma treatment method - Google Patents

Plasma treatment method

Info

Publication number
AU2002359950A1
AU2002359950A1 AU2002359950A AU2002359950A AU2002359950A1 AU 2002359950 A1 AU2002359950 A1 AU 2002359950A1 AU 2002359950 A AU2002359950 A AU 2002359950A AU 2002359950 A AU2002359950 A AU 2002359950A AU 2002359950 A1 AU2002359950 A1 AU 2002359950A1
Authority
AU
Australia
Prior art keywords
treatment method
plasma treatment
plasma
treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002359950A
Inventor
Kiwamu Fujimoto
Takashi Fuse
Jeong Jy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of AU2002359950A1 publication Critical patent/AU2002359950A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31127Etching organic layers
    • H01L21/31133Etching organic layers by chemical means
    • H01L21/31138Etching organic layers by chemical means by dry-etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31144Etching the insulating layers by chemical or physical means using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
AU2002359950A 2002-01-07 2002-12-27 Plasma treatment method Abandoned AU2002359950A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2002000933 2002-01-07
JP2002-933 2002-01-07
JP2002-104160 2002-04-05
JP2002104160A JP4326746B2 (en) 2002-01-07 2002-04-05 Plasma processing method
PCT/JP2002/013861 WO2003058700A1 (en) 2002-01-07 2002-12-27 Plasma treatment method

Publications (1)

Publication Number Publication Date
AU2002359950A1 true AU2002359950A1 (en) 2003-07-24

Family

ID=26625442

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002359950A Abandoned AU2002359950A1 (en) 2002-01-07 2002-12-27 Plasma treatment method

Country Status (4)

Country Link
JP (1) JP4326746B2 (en)
AU (1) AU2002359950A1 (en)
TW (1) TWI270137B (en)
WO (1) WO2003058700A1 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4889199B2 (en) * 2003-11-05 2012-03-07 株式会社アルバック Dry etching method for low dielectric constant interlayer insulating film
US20050101135A1 (en) * 2003-11-12 2005-05-12 Lam Research Corporation Minimizing the loss of barrier materials during photoresist stripping
JP4749683B2 (en) * 2004-06-08 2011-08-17 東京エレクトロン株式会社 Etching method
US7740737B2 (en) 2004-06-21 2010-06-22 Tokyo Electron Limited Plasma processing apparatus and method
TWI574318B (en) * 2004-06-21 2017-03-11 Tokyo Electron Ltd A plasma processing apparatus, a plasma processing method, and a computer-readable recording medium
JP4672455B2 (en) * 2004-06-21 2011-04-20 東京エレクトロン株式会社 Plasma etching apparatus, plasma etching method, and computer-readable storage medium
US7951262B2 (en) 2004-06-21 2011-05-31 Tokyo Electron Limited Plasma processing apparatus and method
JP5036143B2 (en) * 2004-06-21 2012-09-26 東京エレクトロン株式会社 Plasma processing apparatus, plasma processing method, and computer-readable storage medium
US7988816B2 (en) 2004-06-21 2011-08-02 Tokyo Electron Limited Plasma processing apparatus and method
JP4523351B2 (en) * 2004-07-14 2010-08-11 ルネサスエレクトロニクス株式会社 Manufacturing method of semiconductor device
JP4616605B2 (en) * 2004-09-27 2011-01-19 東京エレクトロン株式会社 Plasma processing method, plasma processing apparatus, and storage medium
US8193096B2 (en) 2004-12-13 2012-06-05 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US8129281B1 (en) 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
US7244313B1 (en) * 2006-03-24 2007-07-17 Applied Materials, Inc. Plasma etch and photoresist strip process with intervening chamber de-fluorination and wafer de-fluorination steps
US8435895B2 (en) 2007-04-04 2013-05-07 Novellus Systems, Inc. Methods for stripping photoresist and/or cleaning metal regions
CN102652351B (en) 2009-12-11 2016-10-05 诺发系统有限公司 The enhanced passivation technology of protection silicon before high dose is implanted and divested
US20110143548A1 (en) 2009-12-11 2011-06-16 David Cheung Ultra low silicon loss high dose implant strip
US9613825B2 (en) * 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity
US9514954B2 (en) 2014-06-10 2016-12-06 Lam Research Corporation Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
WO2024142974A1 (en) * 2022-12-28 2024-07-04 東京エレクトロン株式会社 Substrate processing method and substrate processing device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11214356A (en) * 1998-01-29 1999-08-06 Sony Corp Dry etching method of silicon board
JP2000195830A (en) * 1998-12-28 2000-07-14 Mitsubishi Electric Corp Semiconductor equipment, method for cleaning the same, semiconductor device and its manufacture
US6492186B1 (en) * 1999-08-05 2002-12-10 Eaton Corporation Method for detecting an endpoint for an oxygen free plasma process
JP2001135630A (en) * 1999-11-10 2001-05-18 Matsushita Electronics Industry Corp Method of manufacturing semiconductor device

Also Published As

Publication number Publication date
JP4326746B2 (en) 2009-09-09
JP2003264170A (en) 2003-09-19
TW200306625A (en) 2003-11-16
TWI270137B (en) 2007-01-01
WO2003058700A1 (en) 2003-07-17

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase