AU2002239742A1 - Controlled anneal conductors for integrated circuit interconnects - Google Patents
Controlled anneal conductors for integrated circuit interconnectsInfo
- Publication number
- AU2002239742A1 AU2002239742A1 AU2002239742A AU3974202A AU2002239742A1 AU 2002239742 A1 AU2002239742 A1 AU 2002239742A1 AU 2002239742 A AU2002239742 A AU 2002239742A AU 3974202 A AU3974202 A AU 3974202A AU 2002239742 A1 AU2002239742 A1 AU 2002239742A1
- Authority
- AU
- Australia
- Prior art keywords
- conductors
- integrated circuit
- circuit interconnects
- controlled anneal
- anneal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
- H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/745,917 | 2000-12-20 | ||
US09/745,917 US6403474B1 (en) | 2000-12-20 | 2000-12-20 | Controlled anneal conductors for integrated circuit interconnects |
PCT/US2001/050969 WO2002050895A2 (en) | 2000-12-20 | 2001-10-23 | Controlled anneal conductors for integrated circuit interconnects |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2002239742A1 true AU2002239742A1 (en) | 2002-07-01 |
Family
ID=24998778
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2002239742A Abandoned AU2002239742A1 (en) | 2000-12-20 | 2001-10-23 | Controlled anneal conductors for integrated circuit interconnects |
Country Status (4)
Country | Link |
---|---|
US (1) | US6403474B1 (en) |
AU (1) | AU2002239742A1 (en) |
TW (1) | TW552644B (en) |
WO (1) | WO2002050895A2 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6656836B1 (en) * | 2002-03-18 | 2003-12-02 | Advanced Micro Devices, Inc. | Method of performing a two stage anneal in the formation of an alloy interconnect |
US6806542B1 (en) * | 2003-06-30 | 2004-10-19 | Motorola, Inc. | Electronic device having a filled dielectric medium |
US9806253B2 (en) | 2015-11-16 | 2017-10-31 | Samsung Electronics Co., Ltd. | Method for providing a high perpendicular magnetic anisotropy layer in a magnetic junction usable in spin transfer torque magnetic devices using multiple anneals |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5932289A (en) * | 1991-05-28 | 1999-08-03 | Trikon Technologies Limited | Method for filling substrate recesses using pressure and heat treatment |
US5494860A (en) * | 1995-03-14 | 1996-02-27 | International Business Machines Corporation | Two step annealing process for decreasing contact resistance |
US6297154B1 (en) * | 1998-08-28 | 2001-10-02 | Agere System Guardian Corp. | Process for semiconductor device fabrication having copper interconnects |
JP3187011B2 (en) * | 1998-08-31 | 2001-07-11 | 日本電気株式会社 | Method for manufacturing semiconductor device |
JP2000223491A (en) * | 1999-01-29 | 2000-08-11 | Ulvac Japan Ltd | Cu film forming method |
EP1069213A3 (en) * | 1999-07-12 | 2004-01-28 | Applied Materials, Inc. | Optimal anneal technology for micro-voiding control and self-annealing management of electroplated copper |
-
2000
- 2000-12-20 US US09/745,917 patent/US6403474B1/en not_active Expired - Lifetime
-
2001
- 2001-10-23 AU AU2002239742A patent/AU2002239742A1/en not_active Abandoned
- 2001-10-23 WO PCT/US2001/050969 patent/WO2002050895A2/en active Application Filing
- 2001-12-19 TW TW090131436A patent/TW552644B/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
WO2002050895A2 (en) | 2002-06-27 |
TW552644B (en) | 2003-09-11 |
US20020076923A1 (en) | 2002-06-20 |
WO2002050895A3 (en) | 2003-04-17 |
US6403474B1 (en) | 2002-06-11 |
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