AU2002220225A1 - A high performance vliw processor - Google Patents

A high performance vliw processor

Info

Publication number
AU2002220225A1
AU2002220225A1 AU2002220225A AU2022502A AU2002220225A1 AU 2002220225 A1 AU2002220225 A1 AU 2002220225A1 AU 2002220225 A AU2002220225 A AU 2002220225A AU 2022502 A AU2022502 A AU 2022502A AU 2002220225 A1 AU2002220225 A1 AU 2002220225A1
Authority
AU
Australia
Prior art keywords
high performance
vliw processor
performance vliw
processor
vliw
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2002220225A
Other languages
English (en)
Inventor
Mohamed A. Moataz
John R. Spence
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Conexant Systems LLC
Original Assignee
Conexant Systems LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Conexant Systems LLC filed Critical Conexant Systems LLC
Publication of AU2002220225A1 publication Critical patent/AU2002220225A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
    • G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
AU2002220225A 2000-12-05 2001-12-03 A high performance vliw processor Abandoned AU2002220225A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09730039 2000-12-05
US09/730,039 US7127588B2 (en) 2000-12-05 2000-12-05 Apparatus and method for an improved performance VLIW processor
PCT/US2001/046608 WO2002046918A1 (en) 2000-12-05 2001-12-03 A high performance vliw processor

Publications (1)

Publication Number Publication Date
AU2002220225A1 true AU2002220225A1 (en) 2002-06-18

Family

ID=24933656

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2002220225A Abandoned AU2002220225A1 (en) 2000-12-05 2001-12-03 A high performance vliw processor

Country Status (4)

Country Link
US (1) US7127588B2 (de)
EP (1) EP1340141A4 (de)
AU (1) AU2002220225A1 (de)
WO (1) WO2002046918A1 (de)

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US7627721B2 (en) * 2002-10-08 2009-12-01 Rmi Corporation Advanced processor with cache coherency
US8176298B2 (en) * 2002-10-08 2012-05-08 Netlogic Microsystems, Inc. Multi-core multi-threaded processing systems with instruction reordering in an in-order pipeline
US8015567B2 (en) * 2002-10-08 2011-09-06 Netlogic Microsystems, Inc. Advanced processor with mechanism for packet distribution at high line rate
US7984268B2 (en) * 2002-10-08 2011-07-19 Netlogic Microsystems, Inc. Advanced processor scheduling in a multithreaded system
US8037224B2 (en) * 2002-10-08 2011-10-11 Netlogic Microsystems, Inc. Delegating network processor operations to star topology serial bus interfaces
US9088474B2 (en) * 2002-10-08 2015-07-21 Broadcom Corporation Advanced processor with interfacing messaging network to a CPU
US7346757B2 (en) * 2002-10-08 2008-03-18 Rmi Corporation Advanced processor translation lookaside buffer management in a multithreaded system
US7961723B2 (en) 2002-10-08 2011-06-14 Netlogic Microsystems, Inc. Advanced processor with mechanism for enforcing ordering between information sent on two independent networks
US20050033889A1 (en) * 2002-10-08 2005-02-10 Hass David T. Advanced processor with interrupt delivery mechanism for multi-threaded multi-CPU system on a chip
US8478811B2 (en) * 2002-10-08 2013-07-02 Netlogic Microsystems, Inc. Advanced processor with credit based scheme for optimal packet flow in a multi-processor system on a chip
DE102004004561B4 (de) * 2004-01-29 2006-09-14 Infineon Technologies Ag Mikroprozessor mit einer energieeinsparenden Hol- und Dekodiereinheit zum Holen und Decodieren von komprimierten Programmbefehlen und mit einer Programmbefehlsfolgesteuerung
GB2420884B (en) * 2004-12-03 2009-04-15 Picochip Designs Ltd Processor architecture
US7523295B2 (en) * 2005-03-21 2009-04-21 Qualcomm Incorporated Processor and method of grouping and executing dependent instructions in a packet
US7814487B2 (en) 2005-04-26 2010-10-12 Qualcomm Incorporated System and method of executing program threads in a multi-threaded processor
US8713286B2 (en) * 2005-04-26 2014-04-29 Qualcomm Incorporated Register files for a digital signal processor operating in an interleaved multi-threaded environment
US7849466B2 (en) * 2005-07-12 2010-12-07 Qualcomm Incorporated Controlling execution mode of program threads by applying a mask to a control register in a multi-threaded processor
GB2454865B (en) * 2007-11-05 2012-06-13 Picochip Designs Ltd Power control
US9596324B2 (en) * 2008-02-08 2017-03-14 Broadcom Corporation System and method for parsing and allocating a plurality of packets to processor core threads
GB2466661B (en) * 2009-01-05 2014-11-26 Intel Corp Rake receiver
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
GB2474071B (en) 2009-10-05 2013-08-07 Picochip Designs Ltd Femtocell base station
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
GB2491098B (en) 2011-05-16 2015-05-20 Intel Corp Accessing a base station
CN109284131B (zh) * 2013-05-24 2023-05-30 相干逻辑公司 具有可编程优化的存储器-网络处理器
US9715392B2 (en) * 2014-08-29 2017-07-25 Qualcomm Incorporated Multiple clustered very long instruction word processing core

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US4953078A (en) 1987-10-28 1990-08-28 Digital Equipment Corporation Apparatus and method for multi-threaded program execution in a microcoded data processing system
US5787303A (en) * 1991-10-31 1998-07-28 Kabushiki Kaisha Toshiba Digital computer system capable of processing a plurality of instructions in parallel based on a VLIW architecture
WO1994027216A1 (en) 1993-05-14 1994-11-24 Massachusetts Institute Of Technology Multiprocessor coupling system with integrated compile and run time scheduling for parallelism
US5721854A (en) * 1993-11-02 1998-02-24 International Business Machines Corporation Method and apparatus for dynamic conversion of computer instructions
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Also Published As

Publication number Publication date
US7127588B2 (en) 2006-10-24
EP1340141A1 (de) 2003-09-03
EP1340141A4 (de) 2007-09-26
WO2002046918A1 (en) 2002-06-13
US20020069345A1 (en) 2002-06-06

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