AU2001292928A1 - Posted write-through cache for flash memory - Google Patents

Posted write-through cache for flash memory

Info

Publication number
AU2001292928A1
AU2001292928A1 AU2001292928A AU9292801A AU2001292928A1 AU 2001292928 A1 AU2001292928 A1 AU 2001292928A1 AU 2001292928 A AU2001292928 A AU 2001292928A AU 9292801 A AU9292801 A AU 9292801A AU 2001292928 A1 AU2001292928 A1 AU 2001292928A1
Authority
AU
Australia
Prior art keywords
cache
flash memory
flash
manager
entries
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001292928A
Other languages
English (en)
Inventor
Richard Garner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2001292928A1 publication Critical patent/AU2001292928A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0875—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with dedicated cache, e.g. instruction or stack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/202—Non-volatile memory
    • G06F2212/2022—Flash memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7205—Cleaning, compaction, garbage collection, erase control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
AU2001292928A 2000-09-26 2001-09-20 Posted write-through cache for flash memory Abandoned AU2001292928A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/669,609 US6704835B1 (en) 2000-09-26 2000-09-26 Posted write-through cache for flash memory
US09/669,609 2000-09-26
PCT/US2001/029604 WO2002027496A2 (en) 2000-09-26 2001-09-20 Posted write-through cache for flash memory

Publications (1)

Publication Number Publication Date
AU2001292928A1 true AU2001292928A1 (en) 2002-04-08

Family

ID=24686988

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001292928A Abandoned AU2001292928A1 (en) 2000-09-26 2001-09-20 Posted write-through cache for flash memory

Country Status (9)

Country Link
US (1) US6704835B1 (zh)
EP (1) EP1323044B1 (zh)
KR (1) KR100584255B1 (zh)
CN (1) CN100557580C (zh)
AT (1) ATE467181T1 (zh)
AU (1) AU2001292928A1 (zh)
DE (1) DE60142060D1 (zh)
TW (1) TW589528B (zh)
WO (1) WO2002027496A2 (zh)

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US6967869B1 (en) * 2004-07-22 2005-11-22 Cypress Semiconductor Corp. Method and device to improve USB flash write performance
US20060101192A1 (en) * 2004-11-09 2006-05-11 Zilavy Daniel V Systems and methods of nonvolatile memory management
CN1304957C (zh) * 2005-01-07 2007-03-14 清华大学 基于移动存储的计算机系统磁盘同步写性能提高方法
JP5162846B2 (ja) * 2005-07-29 2013-03-13 ソニー株式会社 記憶装置、コンピュータシステム、および記憶システム
US8230175B1 (en) * 2005-08-09 2012-07-24 Hewlett-Packard Development Company, L.P. Data throughput optimization of a storage device having sequential data access
JP2008108227A (ja) * 2006-09-25 2008-05-08 Hitachi Ltd ストレージシステム及び監査ログ管理方法
TWI326028B (en) * 2006-11-20 2010-06-11 Silicon Motion Inc Method for flash memory data management
KR100869675B1 (ko) * 2007-02-05 2008-11-21 지인정보기술 주식회사 디스크립터 배열을 이용한 플래시 메모리 제어 시스템 및방법
US20080235480A1 (en) * 2007-03-21 2008-09-25 Shai Traister Systems for storing memory operations in a queue
US7987332B2 (en) * 2007-03-21 2011-07-26 Sandisk Technologies Inc. Methods for storing memory operations in a queue
US7934069B2 (en) * 2007-04-27 2011-04-26 Hewlett-Packard Development Company, L.P. Enabling and disabling cache in storage systems
CN101308479A (zh) * 2007-05-18 2008-11-19 鸿富锦精密工业（深圳）有限公司 数据存储设备及其数据存储方法
US20090006720A1 (en) * 2007-06-27 2009-01-01 Shai Traister Scheduling phased garbage collection and house keeping operations in a flash memory system
US8504784B2 (en) * 2007-06-27 2013-08-06 Sandisk Technologies Inc. Scheduling methods of phased garbage collection and housekeeping operations in a flash memory system
US20090083482A1 (en) * 2007-09-21 2009-03-26 Vizio Increasing the speed at which flash memory is written and read
US9607664B2 (en) 2007-09-27 2017-03-28 Sandisk Technologies Llc Leveraging portable system power to enhance memory management and enable application level features
TWI344085B (en) * 2007-11-15 2011-06-21 Genesys Logic Inc Storage system for improving efficiency in accessing flash memory and method for the same
JP4675985B2 (ja) * 2008-03-01 2011-04-27 株式会社東芝 メモリシステム
CN101459627B (zh) * 2008-04-07 2012-09-05 中兴通讯股份有限公司 消息管理方法
WO2010055494A1 (en) * 2008-11-17 2010-05-20 Nxp B.V. A cache management policy and corresponding device
GB2472216A (en) 2009-07-28 2011-02-02 Gyrus Medical Ltd Bipolar electrosurgical instrument with four electrodes
US9135261B2 (en) * 2009-12-15 2015-09-15 Emc Corporation Systems and methods for facilitating data discovery
US8677055B2 (en) * 2010-04-12 2014-03-18 Sandisk Enterprises IP LLC Flexible way of specifying storage attributes in a flash memory-based object store
US9164554B2 (en) 2010-04-12 2015-10-20 Sandisk Enterprise Ip Llc Non-volatile solid-state storage system supporting high bandwidth and random access
US8874515B2 (en) 2011-04-11 2014-10-28 Sandisk Enterprise Ip Llc Low level object version tracking using non-volatile memory write generations
CN102254322A (zh) * 2011-06-09 2011-11-23 上海智翔信息科技股份有限公司 一种图像提取方法及装置
US9135064B2 (en) 2012-03-07 2015-09-15 Sandisk Enterprise Ip Llc Fine grained adaptive throttling of background processes
US9201784B2 (en) 2012-09-07 2015-12-01 Kabushiki Kaisha Toshiba Semiconductor storage device and method for controlling nonvolatile semiconductor memory
US9785545B2 (en) * 2013-07-15 2017-10-10 Cnex Labs, Inc. Method and apparatus for providing dual memory access to non-volatile memory
US9348747B2 (en) 2013-10-29 2016-05-24 Seagate Technology Llc Solid state memory command queue in hybrid device
US10031869B1 (en) 2014-03-28 2018-07-24 Adesto Technologies Corporation Cached memory structure and operation
US10310923B1 (en) 2014-08-28 2019-06-04 Seagate Technology Llc Probabilistic aging command sorting
US10372602B2 (en) 2015-01-30 2019-08-06 Hewlett Packard Enterprise Development Lp Ordering updates for nonvolatile memory accesses
US10831403B2 (en) 2017-05-19 2020-11-10 Seagate Technology Llc Probabalistic command aging and selection
US12062406B2 (en) 2020-02-25 2024-08-13 SK Hynix Inc. Storage device and operating method thereof
KR20210108208A (ko) * 2020-02-25 2021-09-02 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법

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US5696917A (en) * 1994-06-03 1997-12-09 Intel Corporation Method and apparatus for performing burst read operations in an asynchronous nonvolatile memory
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Also Published As

Publication number Publication date
WO2002027496A3 (en) 2002-11-21
KR100584255B1 (ko) 2006-05-26
WO2002027496A2 (en) 2002-04-04
CN100557580C (zh) 2009-11-04
US6704835B1 (en) 2004-03-09
EP1323044B1 (en) 2010-05-05
KR20040007395A (ko) 2004-01-24
DE60142060D1 (de) 2010-06-17
CN1476562A (zh) 2004-02-18
ATE467181T1 (de) 2010-05-15
EP1323044A2 (en) 2003-07-02
TW589528B (en) 2004-06-01

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