AU2001292776A1 - Apparatus for implementing a buffered daisy-chain ring connection between a memory controller and memory modules - Google Patents

Apparatus for implementing a buffered daisy-chain ring connection between a memory controller and memory modules

Info

Publication number
AU2001292776A1
AU2001292776A1 AU2001292776A AU9277601A AU2001292776A1 AU 2001292776 A1 AU2001292776 A1 AU 2001292776A1 AU 2001292776 A AU2001292776 A AU 2001292776A AU 9277601 A AU9277601 A AU 9277601A AU 2001292776 A1 AU2001292776 A1 AU 2001292776A1
Authority
AU
Australia
Prior art keywords
daisy
buffered
implementing
chain ring
ring connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001292776A
Inventor
Randy Bonella
James Dodd
John Halbert
Chung Lam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of AU2001292776A1 publication Critical patent/AU2001292776A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1684—Details of memory controller using multiple buses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G06F13/4256—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus using a clocked protocol
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Dram (AREA)
AU2001292776A 2000-09-18 2001-09-18 Apparatus for implementing a buffered daisy-chain ring connection between a memory controller and memory modules Abandoned AU2001292776A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/665,238 US6625687B1 (en) 2000-09-18 2000-09-18 Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing
US09/665,238 2000-09-18
PCT/US2001/029236 WO2002023353A2 (en) 2000-09-18 2001-09-18 Apparatus for implementing a buffered daisy-chain ring connection between a memory controller and memory modules

Publications (1)

Publication Number Publication Date
AU2001292776A1 true AU2001292776A1 (en) 2002-03-26

Family

ID=24669290

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001292776A Abandoned AU2001292776A1 (en) 2000-09-18 2001-09-18 Apparatus for implementing a buffered daisy-chain ring connection between a memory controller and memory modules

Country Status (4)

Country Link
US (1) US6625687B1 (en)
AU (1) AU2001292776A1 (en)
TW (1) TWI223151B (en)
WO (1) WO2002023353A2 (en)

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Also Published As

Publication number Publication date
TWI223151B (en) 2004-11-01
WO2002023353A2 (en) 2002-03-21
US6625687B1 (en) 2003-09-23
WO2002023353A3 (en) 2003-07-31

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