AU2001280945A1 - Capturing and evaluating high speed data streams - Google Patents

Capturing and evaluating high speed data streams

Info

Publication number
AU2001280945A1
AU2001280945A1 AU2001280945A AU8094501A AU2001280945A1 AU 2001280945 A1 AU2001280945 A1 AU 2001280945A1 AU 2001280945 A AU2001280945 A AU 2001280945A AU 8094501 A AU8094501 A AU 8094501A AU 2001280945 A1 AU2001280945 A1 AU 2001280945A1
Authority
AU
Australia
Prior art keywords
serial data
data stream
samples
tester
probability function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001280945A
Inventor
Alan J. Reiss
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teradyne Inc
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc filed Critical Teradyne Inc
Publication of AU2001280945A1 publication Critical patent/AU2001280945A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/27—Built-in tests
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31708—Analysis of signal quality
    • G01R31/31709—Jitter measurements; Jitter generators
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Inspection Of Paper Currency And Valuable Securities (AREA)
  • Dc Digital Transmission (AREA)
  • Investigating Or Analysing Biological Materials (AREA)
  • Holo Graphy (AREA)

Abstract

A system and method for capturing and evaluating high-speed serial data streams using conventional component testers includes a high-speed latching comparator coupled to the output of a device under test (DUT). The component tester stimulates the DUT to produce a high-speed serial data stream and strobes the latching comparator at predetermined instants of time relative to the serial data stream. In response, the latching comparator samples the digital state of the serial data stream and holds the sampled state. The component tester reads and stores the held state. The tester samples the serial data stream at multiple locations in this fashion, and takes multiple samples at each location. The tester averages the samples acquired at each location to render a probability function of the serial data stream verses time. The probability function has values that vary between zero and one, corresponding to the average value of the digital readings sampled at each point. From the probability function, significant timing characteristics of the serial data stream can be deduced, for example, jitter, intersymbol interference, and eye closure.
AU2001280945A 2000-08-09 2001-08-01 Capturing and evaluating high speed data streams Abandoned AU2001280945A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/635,334 2000-08-09
US09/635,334 US6694462B1 (en) 2000-08-09 2000-08-09 Capturing and evaluating high speed data streams
PCT/US2001/024086 WO2002012909A2 (en) 2000-08-09 2001-08-01 Capturing and evaluating high speed data streams

Publications (1)

Publication Number Publication Date
AU2001280945A1 true AU2001280945A1 (en) 2002-02-18

Family

ID=24547370

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001280945A Abandoned AU2001280945A1 (en) 2000-08-09 2001-08-01 Capturing and evaluating high speed data streams

Country Status (10)

Country Link
US (1) US6694462B1 (en)
EP (1) EP1307755B1 (en)
JP (1) JP4989840B2 (en)
KR (1) KR100816468B1 (en)
CN (1) CN1185500C (en)
AT (1) ATE384268T1 (en)
AU (1) AU2001280945A1 (en)
DE (1) DE60132462T2 (en)
TW (1) TW514738B (en)
WO (1) WO2002012909A2 (en)

Families Citing this family (63)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7346278B2 (en) * 2001-02-05 2008-03-18 Finisar Corporation Analog to digital signal conditioning in optoelectronic transceivers
US7302186B2 (en) * 2001-02-05 2007-11-27 Finisar Corporation Optical transceiver and host adapter with memory mapped monitoring circuitry
US7149430B2 (en) * 2001-02-05 2006-12-12 Finsiar Corporation Optoelectronic transceiver having dual access to onboard diagnostics
US7079775B2 (en) 2001-02-05 2006-07-18 Finisar Corporation Integrated memory mapped controller circuit for fiber optics transceiver
US20040197101A1 (en) * 2001-02-05 2004-10-07 Sasser Gary D. Optical transceiver module with host accessible on-board diagnostics
JP2002257903A (en) * 2001-03-01 2002-09-11 Nec Corp Method for testing semiconductor integrated circuit and method for generating test pattern and its device and program
US7401272B1 (en) * 2001-03-09 2008-07-15 Pmc-Sierra, Inc. Apparatus and method for high speed sampling or testing of data signals using automated testing equipment
US6975642B2 (en) 2001-09-17 2005-12-13 Finisar Corporation Optoelectronic device capable of participating in in-band traffic
US6862302B2 (en) * 2002-02-12 2005-03-01 Finisar Corporation Maintaining desirable performance of optical emitters over temperature variations
KR100446298B1 (en) * 2002-04-02 2004-08-30 삼성전자주식회사 Circuit for measuring a rising or falling time of high speed data and method thereof
US7486894B2 (en) * 2002-06-25 2009-02-03 Finisar Corporation Transceiver module and integrated circuit with dual eye openers
US7809275B2 (en) 2002-06-25 2010-10-05 Finisar Corporation XFP transceiver with 8.5G CDR bypass
US7561855B2 (en) 2002-06-25 2009-07-14 Finisar Corporation Transceiver module and integrated circuit with clock and data recovery clock diplexing
US7437079B1 (en) 2002-06-25 2008-10-14 Finisar Corporation Automatic selection of data rate for optoelectronic devices
US7664401B2 (en) * 2002-06-25 2010-02-16 Finisar Corporation Apparatus, system and methods for modifying operating characteristics of optoelectronic devices
EP1426779B1 (en) * 2002-07-25 2007-08-15 Agilent Technologies, Inc. BER tester with signal sampling with clock recovery
US7477847B2 (en) * 2002-09-13 2009-01-13 Finisar Corporation Optical and electrical channel feedback in optical transceiver module
US7082556B2 (en) 2002-10-07 2006-07-25 Finisar Corporation System and method of detecting a bit processing error
US7020567B2 (en) * 2002-10-31 2006-03-28 Finisar Corporation System and method of measuring a signal propagation delay
US6937949B1 (en) * 2002-10-31 2005-08-30 Finisar Corporation System and method of processing a data signal
US6985823B2 (en) * 2002-10-31 2006-01-10 Finisar Corporation System and method of testing a transceiver
US7317743B2 (en) * 2002-11-08 2008-01-08 Finisar Corporation Temperature and jitter compensation controller circuit and method for fiber optics device
US7230961B2 (en) 2002-11-08 2007-06-12 Finisar Corporation Temperature and jitter compensation controller circuit and method for fiber optics device
US7143323B2 (en) * 2002-12-13 2006-11-28 Teradyne, Inc. High speed capture and averaging of serial data by asynchronous periodic sampling
US7636642B2 (en) * 2003-06-19 2009-12-22 Teradyne, Inc. Direct jitter analysis of binary sampled data
US7213224B2 (en) * 2003-12-02 2007-05-01 Lsi Logic Corporation Customizable development and demonstration platform for structured ASICs
US7426586B2 (en) * 2003-12-15 2008-09-16 Finisar Corporation Configurable input/output terminals
US7058535B2 (en) * 2004-02-12 2006-06-06 Credence Systems Corporation Test system for integrated circuits with serdes ports
US7466156B2 (en) * 2004-03-25 2008-12-16 International Business Machines Corporation System of digitally testing an analog driver circuit
US7983142B2 (en) 2004-03-30 2011-07-19 Intel Corporation Apparatus, systems, and methods for the reception and synchronization of asynchronous signals
US7174279B2 (en) * 2004-03-31 2007-02-06 Teradyne, Inc. Test system with differential signal measurement
KR100594268B1 (en) * 2004-04-02 2006-06-30 삼성전자주식회사 Measurement circuit and method merging serially and analysing the single-ended signals
US7630631B2 (en) * 2004-04-14 2009-12-08 Finisar Corporation Out-of-band data communication between network transceivers
TWI383294B (en) * 2004-05-25 2013-01-21 Hewlett Packard Development Co System to identify components of a data communications architecture
US7447438B2 (en) * 2004-07-02 2008-11-04 Finisar Corporation Calibration of digital diagnostics information in an optical transceiver prior to reporting to host
US8639122B2 (en) * 2004-07-02 2014-01-28 Finisar Corporation Filtering digital diagnostics information in an optical transceiver prior to reporting to host
US7590170B2 (en) * 2004-09-29 2009-09-15 Teradyne, Inc. Method and apparatus for measuring jitter
US7532820B2 (en) 2004-10-29 2009-05-12 Finisar Corporation Systems and methods for providing diagnostic information using EDC transceivers
US7102375B2 (en) * 2004-12-23 2006-09-05 Teradyne, Inc. Pin electronics with high voltage functionality
US7668235B2 (en) * 2005-11-10 2010-02-23 Teradyne Jitter measurement algorithm using locally in-order strobes
US7349818B2 (en) 2005-11-10 2008-03-25 Teradyne, Inc. Determining frequency components of jitter
US7856463B2 (en) * 2006-03-21 2010-12-21 Advantest Corporation Probability density function separating apparatus, probability density function separating method, testing apparatus, bit error rate measuring apparatus, electronic device, and program
EP1865649A1 (en) * 2006-06-06 2007-12-12 STMicroelectronics S.r.l. Clock and data recovery using both oversampling and tracking
US7849374B1 (en) 2006-10-11 2010-12-07 Ltx Corporation Testing a transceiver
JP4869879B2 (en) * 2006-11-20 2012-02-08 富士通セミコンダクター株式会社 Semiconductor integrated circuit
US8452560B2 (en) * 2006-12-29 2013-05-28 Teradyne, Inc. Identifying periodic jitter in a signal
US7957924B2 (en) * 2007-08-07 2011-06-07 Ltx-Credence Corporation System and method for distortion analysis
US8024142B1 (en) 2007-12-20 2011-09-20 Pmc-Sierra Us, Inc. Method and system for analyzing signal waveforms
US8259888B2 (en) * 2008-05-23 2012-09-04 Integrated Device Technology, Inc. Method of processing signal data with corrected clock phase offset
US8194721B2 (en) * 2008-05-23 2012-06-05 Integrated Device Technology, Inc Signal amplitude distortion within an integrated circuit
US20090292962A1 (en) * 2008-05-23 2009-11-26 Arm Limited Integrated circuit with inter-symbol interference self-testing
US8179952B2 (en) * 2008-05-23 2012-05-15 Integrated Device Technology Inc. Programmable duty cycle distortion generation circuit
US8159956B2 (en) * 2008-07-01 2012-04-17 Finisar Corporation Diagnostics for serial communication busses
US8467436B1 (en) 2009-04-29 2013-06-18 Pmc-Sierra Us, Inc. DSP-based diagnostics for monitoring a SerDes link
JP5134026B2 (en) * 2010-02-09 2013-01-30 アンリツ株式会社 Error rate measuring apparatus and method
JP5194067B2 (en) * 2010-07-08 2013-05-08 アンリツ株式会社 Error rate measuring apparatus and error rate measuring method
EP2645257A3 (en) * 2012-03-29 2014-06-18 Prelert Ltd. System and method for visualisation of behaviour within computer infrastructure
US9577818B2 (en) * 2015-02-04 2017-02-21 Teradyne, Inc. High speed data transfer using calibrated, single-clock source synchronous serializer-deserializer protocol
US20200249275A1 (en) * 2019-01-31 2020-08-06 Tektronix, Inc. Systems, methods and devices for high-speed input/output margin testing
DE102019112447A1 (en) * 2019-05-13 2020-11-19 Jenoptik Optical Systems Gmbh Method and evaluation unit for determining the point in time of an edge in a signal
CN112698181B (en) * 2020-12-07 2021-09-21 电子科技大学 State-configurable in-situ aging sensor system
CN113992552A (en) * 2021-10-21 2022-01-28 奇瑞商用车（安徽）有限公司 Automobile CAN/CANFD physical layer system testing device and method
US20230184821A1 (en) * 2021-12-09 2023-06-15 Nanya Technology Corporation Appratus for performing multiple tests on a device under test

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4354177A (en) 1980-11-07 1982-10-12 Fairchild Camera & Instr. Corp. Method and apparatus for calibrating an analog-to-digital converter for a digital-to-analog converter test system
DE4118978A1 (en) 1991-06-08 1992-12-10 Rohde & Schwarz METHOD AND ARRANGEMENT FOR MEASURING THE VALUES LIKE PEAK, AVERAGE OR EFFECTIVE VALUE OF AN AC VOLTAGE
JP3612694B2 (en) * 1996-03-29 2005-01-19 ソニー株式会社 Test signal generating apparatus and digital data signal output apparatus
US5737342A (en) * 1996-05-31 1998-04-07 Quantum Corporation Method for in-chip testing of digital circuits of a synchronously sampled data detection channel
JP3684560B2 (en) * 1996-09-03 2005-08-17 ソニー株式会社 Data receiving apparatus and method
US6331999B1 (en) * 1998-01-15 2001-12-18 Lsi Logic Corporation Serial data transceiver architecture and test method for measuring the amount of jitter within a serial data stream
DE19913753A1 (en) 1998-04-01 1999-10-07 Mannesmann Rexroth Ag Process to determine arithmetic, geometric, or quadratic means of time series
US6260166B1 (en) * 1998-06-01 2001-07-10 Compaq Computer Corporation Observability register architecture for efficient production test and debug
US6536005B1 (en) * 1999-10-26 2003-03-18 Teradyne, Inc. High-speed failure capture apparatus and method for automatic test equipment

Also Published As

Publication number Publication date
TW514738B (en) 2002-12-21
KR20030042450A (en) 2003-05-28
WO2002012909A2 (en) 2002-02-14
CN1185500C (en) 2005-01-19
CN1446318A (en) 2003-10-01
KR100816468B1 (en) 2008-03-26
EP1307755B1 (en) 2008-01-16
WO2002012909A3 (en) 2002-11-21
JP2004506204A (en) 2004-02-26
DE60132462T2 (en) 2009-01-15
JP4989840B2 (en) 2012-08-01
ATE384268T1 (en) 2008-02-15
US6694462B1 (en) 2004-02-17
EP1307755A2 (en) 2003-05-07
DE60132462D1 (en) 2008-03-06

Similar Documents

Publication Publication Date Title
AU2001280945A1 (en) Capturing and evaluating high speed data streams
US6374388B1 (en) Equivalent time capture scheme for bit patterns within high data rate signals
TWI431984B (en) Method for capturing multiple data packets in a data signal for analysis
US6031847A (en) Method and system for deskewing parallel bus channels
US7363562B2 (en) Method and apparatus for deferred decision signal quality analysis
US20070200550A1 (en) Trigger architecture, measurement system and method of use
WO2005122456A3 (en) Method and apparatus for monitoring latency, jitter, packet throughput and packet loss ratio between two points on a network
JP2001352350A (en) Measurement system and method by statistic eye-diagram of continuous bit stream
JP5254795B2 (en) Strobe technique for time stamping digital signals
US20070126487A1 (en) Strobe technique for recovering a clock in a digital signal
EP1780927B1 (en) Determination of a jitter property of a signal
JPH03103770A (en) Signal analyzing method
US7069488B2 (en) Signal sampling with sampling and reference paths
EP1847844A1 (en) Digital data signal analysis by evaluating sampled values in conjuction with signal bit values
EP1847843B1 (en) Digital data sampling by applying a plurality of time delayed trigger signals
KR20040009505A (en) test system for testing jitter of high speed data output device and total jitter testing method
US6760574B1 (en) Two-dimensional signal detector with dynamic timing phase compensation
US20070268162A1 (en) Equivalent-time sampling of quasi-repeating bit patterns
US7308371B2 (en) Bit error rate testing for high-speed devices
EP1391998A3 (en) Spread spectrum data receiving device
CN109803064B (en) Method and device for enhancing stability of camera module
JP3069717B2 (en) Test method for communication IC
KR100244507B1 (en) Real time/equivalent time analysis circuit for dut
KR100493238B1 (en) Apparatus and method of multi-mode modem testing
JP2003188861A (en) Error measuring instrument