AU2001270694A1 - Frequency synthesis method using a fractional phase locked loop - Google Patents

Frequency synthesis method using a fractional phase locked loop

Info

Publication number
AU2001270694A1
AU2001270694A1 AU2001270694A AU7069401A AU2001270694A1 AU 2001270694 A1 AU2001270694 A1 AU 2001270694A1 AU 2001270694 A AU2001270694 A AU 2001270694A AU 7069401 A AU7069401 A AU 7069401A AU 2001270694 A1 AU2001270694 A1 AU 2001270694A1
Authority
AU
Australia
Prior art keywords
locked loop
synthesis method
phase locked
frequency synthesis
fractional phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001270694A
Inventor
Arnaud Brunet
Sebastien Rieubon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Original Assignee
Alcatel CIT SA
Alcatel SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel CIT SA, Alcatel SA filed Critical Alcatel CIT SA
Publication of AU2001270694A1 publication Critical patent/AU2001270694A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H03L7/1976Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider
    • H03L7/1978Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division using a phase accumulator for controlling the counter or frequency divider using a cycle or pulse removing circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
AU2001270694A 2000-06-30 2001-06-28 Frequency synthesis method using a fractional phase locked loop Abandoned AU2001270694A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0008495 2000-06-30
FR0008495A FR2811167A1 (en) 2000-06-30 2000-06-30 FREQUENCY SYNTHESIS METHOD AND DEVICE USING A FRACTIONAL PHASE LOCKED LOOP
PCT/FR2001/002065 WO2002001722A1 (en) 2000-06-30 2001-06-28 Frequency synthesis method using a fractional phase locked loop

Publications (1)

Publication Number Publication Date
AU2001270694A1 true AU2001270694A1 (en) 2002-01-08

Family

ID=8851943

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001270694A Abandoned AU2001270694A1 (en) 2000-06-30 2001-06-28 Frequency synthesis method using a fractional phase locked loop

Country Status (3)

Country Link
AU (1) AU2001270694A1 (en)
FR (1) FR2811167A1 (en)
WO (1) WO2002001722A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015128220A (en) * 2013-12-27 2015-07-09 セイコーエプソン株式会社 Oscillator circuit, oscillator, electronic apparatus, movable body and frequency adjustment method of oscillator

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0278140A1 (en) * 1987-02-12 1988-08-17 Hewlett-Packard Limited Clock signal generation
GB2238434B (en) * 1989-11-22 1994-03-16 Stc Plc Frequency synthesiser
US5055802A (en) * 1990-04-30 1991-10-08 Motorola, Inc. Multiaccumulator sigma-delta fractional-n synthesis
US5570066A (en) * 1994-08-30 1996-10-29 Motorola, Inc. Method of programming a frequency synthesizer
US6154095A (en) * 1997-02-27 2000-11-28 Seiko Epson Corporation Phase locked loop clock source provided with a plurality of frequency adjustments
US6236275B1 (en) * 1997-10-24 2001-05-22 Ericsson Inc. Digital frequency synthesis by sequential fraction approximations

Also Published As

Publication number Publication date
WO2002001722A1 (en) 2002-01-03
FR2811167A1 (en) 2002-01-04

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