AU2001262755A1 - Method for controlling cache system comprising direct-mapped cache and fully-associative buffer - Google Patents

Method for controlling cache system comprising direct-mapped cache and fully-associative buffer

Info

Publication number
AU2001262755A1
AU2001262755A1 AU2001262755A AU6275501A AU2001262755A1 AU 2001262755 A1 AU2001262755 A1 AU 2001262755A1 AU 2001262755 A AU2001262755 A AU 2001262755A AU 6275501 A AU6275501 A AU 6275501A AU 2001262755 A1 AU2001262755 A1 AU 2001262755A1
Authority
AU
Australia
Prior art keywords
cache
fully
direct
controlling
mapped
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001262755A
Inventor
Shin-Dug Kim
Jung-Hoon Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
SHIN DUG KIM
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHIN DUG KIM, Samsung Electronics Co Ltd filed Critical SHIN DUG KIM
Publication of AU2001262755A1 publication Critical patent/AU2001262755A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G06F12/0897—Caches characterised by their organisation or structure with two or more cache hierarchy levels
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
AU2001262755A 2000-05-16 2001-05-16 Method for controlling cache system comprising direct-mapped cache and fully-associative buffer Abandoned AU2001262755A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR1020000026187A KR100335500B1 (en) 2000-05-16 2000-05-16 Method for controlling cache system which comprises direct-mapped cache and fully-associative buffer
KR0026187 2000-05-16
PCT/KR2001/000793 WO2001088716A1 (en) 2000-05-16 2001-05-16 Method for controlling cache system comprising direct-mapped cache and fully-associative buffer

Publications (1)

Publication Number Publication Date
AU2001262755A1 true AU2001262755A1 (en) 2001-11-26

Family

ID=19668781

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001262755A Abandoned AU2001262755A1 (en) 2000-05-16 2001-05-16 Method for controlling cache system comprising direct-mapped cache and fully-associative buffer

Country Status (7)

Country Link
US (1) US7047362B2 (en)
JP (1) JP4218820B2 (en)
KR (1) KR100335500B1 (en)
CN (1) CN1302393C (en)
AU (1) AU2001262755A1 (en)
GB (1) GB2377298B (en)
WO (1) WO2001088716A1 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7133975B1 (en) * 2003-01-21 2006-11-07 Advanced Micro Devices, Inc. Cache memory system including a cache memory employing a tag including associated touch bits
US7260681B2 (en) * 2005-06-02 2007-08-21 Seagate Technology Llc Stripe buffer list
US7401188B2 (en) * 2005-06-29 2008-07-15 Intel Corporation Method, device, and system to avoid flushing the contents of a cache by not inserting data from large requests
KR100659984B1 (en) * 2005-12-28 2006-12-22 주식회사 에너테크 An apparatus of hybrid filter type for reduction of harmonic frequency
US8499120B2 (en) * 2008-10-17 2013-07-30 Seagate Technology Llc User selectable caching management
US8209489B2 (en) * 2008-10-22 2012-06-26 International Business Machines Corporation Victim cache prefetching
US8347037B2 (en) 2008-10-22 2013-01-01 International Business Machines Corporation Victim cache replacement
US8225045B2 (en) * 2008-12-16 2012-07-17 International Business Machines Corporation Lateral cache-to-cache cast-in
US8117397B2 (en) * 2008-12-16 2012-02-14 International Business Machines Corporation Victim cache line selection
US8499124B2 (en) * 2008-12-16 2013-07-30 International Business Machines Corporation Handling castout cache lines in a victim cache
US8489819B2 (en) * 2008-12-19 2013-07-16 International Business Machines Corporation Victim cache lateral castout targeting
US8949540B2 (en) * 2009-03-11 2015-02-03 International Business Machines Corporation Lateral castout (LCO) of victim cache line in data-invalid state
CN101515295B (en) * 2009-03-23 2010-12-01 浙江大学 Realization method for supporting high-speed buffer of hardware database on chip
US8285939B2 (en) * 2009-04-08 2012-10-09 International Business Machines Corporation Lateral castout target selection
US8347036B2 (en) * 2009-04-09 2013-01-01 International Business Machines Corporation Empirically based dynamic control of transmission of victim cache lateral castouts
US8312220B2 (en) * 2009-04-09 2012-11-13 International Business Machines Corporation Mode-based castout destination selection
US8327073B2 (en) * 2009-04-09 2012-12-04 International Business Machines Corporation Empirically based dynamic control of acceptance of victim cache lateral castouts
US9189403B2 (en) * 2009-12-30 2015-11-17 International Business Machines Corporation Selective cache-to-cache lateral castouts
JP2012194742A (en) * 2011-03-16 2012-10-11 Nec Engineering Ltd Replacement data memory device, central processing unit and replacement data processing method
JP5791133B2 (en) * 2014-08-13 2015-10-07 Ｎｅｃエンジニアリング株式会社 Replacement data memory device, central processing unit, and replacement data processing program
TWI755878B (en) * 2020-09-30 2022-02-21 威聯通科技股份有限公司 Method for dynamically varying amount of prefetched data and terminal apparatus using the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2264577A (en) * 1940-02-27 1941-12-02 United Shoe Machinery Corp Lasting machine
US4493026A (en) * 1982-05-26 1985-01-08 International Business Machines Corporation Set associative sector cache
US6047357A (en) * 1995-01-27 2000-04-04 Digital Equipment Corporation High speed method for maintaining cache coherency in a multi-level, set associative cache hierarchy
US6170999B1 (en) * 1996-12-27 2001-01-09 Canon Kabushiki Kaisha Power transmission device wherein a film take-up spool gear also partakes in film rewinding
KR100333587B1 (en) * 1997-08-29 2002-09-25 엘지전자주식회사 Device for preventing counter flow of cool air in refrigerator
US6397296B1 (en) * 1999-02-19 2002-05-28 Hitachi Ltd. Two-level instruction cache for embedded processors
US6460115B1 (en) * 1999-11-08 2002-10-01 International Business Machines Corporation System and method for prefetching data to multiple levels of cache including selectively using a software hint to override a hardware prefetch mechanism
US6609177B1 (en) * 1999-11-12 2003-08-19 Maxtor Corporation Method and apparatus for extending cache history

Also Published As

Publication number Publication date
KR20000050112A (en) 2000-08-05
GB2377298A (en) 2003-01-08
US7047362B2 (en) 2006-05-16
JP4218820B2 (en) 2009-02-04
WO2001088716A1 (en) 2001-11-22
JP2003533822A (en) 2003-11-11
US20030149842A1 (en) 2003-08-07
KR100335500B1 (en) 2002-05-08
GB2377298B (en) 2004-12-22
CN1429366A (en) 2003-07-09
GB0222826D0 (en) 2002-11-06
CN1302393C (en) 2007-02-28

Similar Documents

Publication Publication Date Title
AU2001262755A1 (en) Method for controlling cache system comprising direct-mapped cache and fully-associative buffer
AU2001259342A1 (en) System and method for high-speed substitute cache
AU2001259845A1 (en) Application caching system and method
AU2002226090A1 (en) Method and system for adaptive prefetching
AU2002248679A1 (en) Method and system for speculatively invalidating lines in a cache
AU2002353144A1 (en) System and meth0d for adaptive result set caching
GB2368160B (en) Method, system, and program for demoting data from cache
AU2001251636A1 (en) System and method for network caching
AU2003222459A1 (en) Methods and apparatus for controlling hierarchical cache memory
AU2001266660A1 (en) Method and system for virtual prototyping
AU2003238928A1 (en) System and method for inquiry caching
AU2002357273A1 (en) Cache storage system and method
AU2002359651A1 (en) System and method of data replacement in cache ways
AU2003241014A1 (en) Methods and system for using caches
AU2001281375A1 (en) Method and apparatus for software prefetching using non-faulting loads
AU2001263118A1 (en) A system and method for an internet cache
AU2002351415A1 (en) System and method for applet caching
HK1054273B (en) Computer system and computer system controlling method
AU2001249188A1 (en) Method and apparatus for writing instructions into a buffer queue including overwriting invalid entries
AU2001285085A1 (en) System and method for proactive caching employing graphical usage description
AU2002241497A1 (en) Method and architecture for serving and caching web objects on the modern internet
AUPQ697000A0 (en) Image cache system and method
AU2002250314A1 (en) System and method for stream caching
AU2002241205A1 (en) Cache entry selection method and apparatus
AU2002235490A1 (en) System and method for adaptive data caching