AU2001259342A1 - System and method for high-speed substitute cache - Google Patents

System and method for high-speed substitute cache

Info

Publication number
AU2001259342A1
AU2001259342A1 AU2001259342A AU5934201A AU2001259342A1 AU 2001259342 A1 AU2001259342 A1 AU 2001259342A1 AU 2001259342 A AU2001259342 A AU 2001259342A AU 5934201 A AU5934201 A AU 5934201A AU 2001259342 A1 AU2001259342 A1 AU 2001259342A1
Authority
AU
Australia
Prior art keywords
cache
speed substitute
speed
substitute cache
substitute
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001259342A
Inventor
Michael Dempsey
Eric Dickman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Superspeed Software Inc
Original Assignee
Superspeed Software Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Superspeed Software Inc filed Critical Superspeed Software Inc
Publication of AU2001259342A1 publication Critical patent/AU2001259342A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/31—Providing disk cache in a specific location of a storage system
    • G06F2212/311—In host system
AU2001259342A 2000-05-15 2001-05-02 System and method for high-speed substitute cache Abandoned AU2001259342A1 (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US20426600P 2000-05-15 2000-05-15
US60/204,266 2000-05-15
US24843100P 2000-11-14 2000-11-14
US60/248,431 2000-11-14
PCT/US2001/014088 WO2001088720A2 (en) 2000-05-15 2001-05-02 System and method for high-speed substitute cache

Publications (1)

Publication Number Publication Date
AU2001259342A1 true AU2001259342A1 (en) 2001-11-26

Family

ID=26899325

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001259342A Abandoned AU2001259342A1 (en) 2000-05-15 2001-05-02 System and method for high-speed substitute cache

Country Status (3)

Country Link
US (1) US6629201B2 (en)
AU (1) AU2001259342A1 (en)
WO (1) WO2001088720A2 (en)

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US7490197B2 (en) 2004-10-21 2009-02-10 Microsoft Corporation Using external memory devices to improve system performance
US8250296B2 (en) * 2004-12-01 2012-08-21 Dell Products L.P. System and method for information handling system memory page mapping optimization
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US9152823B2 (en) * 2005-04-22 2015-10-06 Storagecraft Technology Corporation Systems, methods, and computer readable media for computer data protection
US8914557B2 (en) 2005-12-16 2014-12-16 Microsoft Corporation Optimizing write and wear performance for a memory
US7752386B1 (en) 2005-12-29 2010-07-06 Datacore Software Corporation Application performance acceleration
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US7886099B2 (en) * 2006-06-16 2011-02-08 Superspeed Llc Systems and methods for providing a personal computer with non-volatile system memory
US9860274B2 (en) 2006-09-13 2018-01-02 Sophos Limited Policy management
US20080172387A1 (en) * 2007-01-16 2008-07-17 Olaf Manczak Speeding up traversal of a file system tree
US8631203B2 (en) 2007-12-10 2014-01-14 Microsoft Corporation Management of external memory functioning as virtual cache
US8275970B2 (en) * 2008-05-15 2012-09-25 Microsoft Corp. Optimizing write traffic to a disk
US8032707B2 (en) 2008-09-15 2011-10-04 Microsoft Corporation Managing cache data and metadata
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US7953774B2 (en) 2008-09-19 2011-05-31 Microsoft Corporation Aggregation of write traffic to a data store
US8214596B2 (en) * 2008-09-30 2012-07-03 Intel Corporation Apparatus and method for segmented cache utilization
US8433850B2 (en) * 2008-12-02 2013-04-30 Intel Corporation Method and apparatus for pipeline inclusion and instruction restarts in a micro-op cache of a processor
US9076239B2 (en) 2009-04-30 2015-07-07 Stmicroelectronics S.R.L. Method and systems for thumbnail generation, and corresponding computer program product
US8631198B2 (en) * 2010-08-06 2014-01-14 Seagate Technology Llc Dynamic cache reduction utilizing voltage warning mechanism
US20130031327A1 (en) * 2011-07-28 2013-01-31 Yung Chang System and method for allocating cache memory
US20140149650A1 (en) * 2012-11-29 2014-05-29 Jason Caulkins Caching Program Optimization
US9483352B2 (en) * 2013-09-27 2016-11-01 Fisher-Rosemont Systems, Inc. Process control systems and methods
US9824030B2 (en) 2015-10-30 2017-11-21 International Business Machines Corporation Adjusting active cache size based on cache usage
US11275619B2 (en) * 2016-05-16 2022-03-15 International Business Machines Corporation Opportunistic data analytics using memory bandwidth in disaggregated computing systems
US11474697B2 (en) 2016-05-16 2022-10-18 International Business Machines Corporation Opportunistic data analytics using memory bandwidth in disaggregated computing systems
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Also Published As

Publication number Publication date
WO2001088720A2 (en) 2001-11-22
WO2001088720A3 (en) 2003-10-02
US6629201B2 (en) 2003-09-30
US20010037433A1 (en) 2001-11-01

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