AU2001256898A1 - Method for substrate noise distribution - Google Patents
Method for substrate noise distributionInfo
- Publication number
- AU2001256898A1 AU2001256898A1 AU2001256898A AU5689801A AU2001256898A1 AU 2001256898 A1 AU2001256898 A1 AU 2001256898A1 AU 2001256898 A AU2001256898 A AU 2001256898A AU 5689801 A AU5689801 A AU 5689801A AU 2001256898 A1 AU2001256898 A1 AU 2001256898A1
- Authority
- AU
- Australia
- Prior art keywords
- noise distribution
- substrate noise
- substrate
- distribution
- noise
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/765—Making of isolation regions between components by field effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1083—Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
- H01L29/1087—Substrate region of field-effect devices of field-effect transistors with insulated gate characterised by the contact structure of the substrate region, e.g. for controlling or preventing bipolar effect
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
- H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
- H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Amplifiers (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE0001791A SE518231C2 (en) | 2000-05-12 | 2000-05-12 | Method for noise distribution in substrates with high resistivity including differential or balanced integrated coupling |
SE0001791 | 2000-05-12 | ||
PCT/SE2001/000954 WO2001086706A1 (en) | 2000-05-12 | 2001-05-04 | Method for substrate noise distribution |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001256898A1 true AU2001256898A1 (en) | 2001-11-20 |
Family
ID=20279676
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001256898A Abandoned AU2001256898A1 (en) | 2000-05-12 | 2001-05-04 | Method for substrate noise distribution |
Country Status (8)
Country | Link |
---|---|
US (1) | US6514799B2 (en) |
EP (1) | EP1284012A1 (en) |
JP (1) | JP2003533045A (en) |
CN (1) | CN1214448C (en) |
AU (1) | AU2001256898A1 (en) |
SE (1) | SE518231C2 (en) |
TW (1) | TW480707B (en) |
WO (1) | WO2001086706A1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2820547A1 (en) * | 2001-02-05 | 2002-08-09 | St Microelectronics Sa | PROTECTION STRUCTURE AGAINST PESTS |
US7492018B2 (en) * | 2004-09-17 | 2009-02-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Isolating substrate noise by forming semi-insulating regions |
US7071530B1 (en) | 2005-01-27 | 2006-07-04 | International Business Machines Corporation | Multiple layer structure for substrate noise isolation |
US20070090385A1 (en) * | 2005-10-21 | 2007-04-26 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US11309412B1 (en) * | 2017-05-17 | 2022-04-19 | Northrop Grumman Systems Corporation | Shifting the pinch-off voltage of an InP high electron mobility transistor with a metal ring |
CN109884561B (en) * | 2019-03-29 | 2021-04-20 | 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) | Magnetic field detection module and magnetic field probe |
CN109884562B (en) * | 2019-03-29 | 2021-04-16 | 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) | Differential magnetic field detection module and magnetic field probe |
CN110095656B (en) * | 2019-05-27 | 2021-03-09 | 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) | Probe module and probe |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0682686B2 (en) * | 1987-03-20 | 1994-10-19 | 日本ビクター株式会社 | Field effect transistor |
JP2953482B2 (en) * | 1992-01-17 | 1999-09-27 | 日本電気株式会社 | CMOS integrated circuit |
US5756387A (en) * | 1994-12-30 | 1998-05-26 | Sgs-Thomson Microelectronics S.R.L. | Method for forming zener diode with high time stability and low noise |
US5973952A (en) * | 1998-03-30 | 1999-10-26 | Lsi Logic Corporation | Embedded DRAM with noise protecting shielding conductor |
FR2787636B1 (en) * | 1998-12-17 | 2001-03-16 | St Microelectronics Sa | SEMICONDUCTOR DEVICE WITH NOISE DECOUPLING BICMOS TYPE SUBSTRATE |
EP1334543A4 (en) * | 2000-11-15 | 2008-10-29 | X2Y Attenuators Llc | Energy pathway arrangement |
-
2000
- 2000-05-12 SE SE0001791A patent/SE518231C2/en unknown
- 2000-07-10 TW TW089113666A patent/TW480707B/en not_active IP Right Cessation
-
2001
- 2001-05-04 WO PCT/SE2001/000954 patent/WO2001086706A1/en active Application Filing
- 2001-05-04 CN CNB018093892A patent/CN1214448C/en not_active Expired - Fee Related
- 2001-05-04 JP JP2001582827A patent/JP2003533045A/en active Pending
- 2001-05-04 EP EP01930366A patent/EP1284012A1/en not_active Withdrawn
- 2001-05-04 AU AU2001256898A patent/AU2001256898A1/en not_active Abandoned
- 2001-05-11 US US09/852,785 patent/US6514799B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO2001086706A1 (en) | 2001-11-15 |
SE0001791D0 (en) | 2000-05-12 |
US20020025610A1 (en) | 2002-02-28 |
EP1284012A1 (en) | 2003-02-19 |
SE0001791L (en) | 2001-11-13 |
US6514799B2 (en) | 2003-02-04 |
CN1214448C (en) | 2005-08-10 |
TW480707B (en) | 2002-03-21 |
CN1429403A (en) | 2003-07-09 |
SE518231C2 (en) | 2002-09-10 |
JP2003533045A (en) | 2003-11-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2651701A (en) | Method for introducing additives | |
AU2002360993A1 (en) | Method for coating objects | |
AU2000276782A1 (en) | Spray-spin coating method | |
AU2002213972A1 (en) | Method for producing polyisobutenylphenoles | |
AU2001279897A1 (en) | Plasma coating method | |
EP1170715A3 (en) | Method for surface surveillance | |
AU2452899A (en) | Method for etching | |
AU2001256898A1 (en) | Method for substrate noise distribution | |
AU2001274530A1 (en) | Lot distributing method | |
AU2001290313A1 (en) | Service providing method | |
AU2001237530A1 (en) | Method | |
AU2001237546A1 (en) | Methods for characterizing polymorphisms | |
AU2002245173A1 (en) | Method for performing registration audits | |
AU2002357591A1 (en) | Substrate treating method | |
AU2002302775A1 (en) | Autocatalytic coating method | |
AU7957200A (en) | Method for distributing pay-information | |
AU2001241636A1 (en) | Halotherapy method | |
AU2001244284A1 (en) | Particle coating method | |
AU2002220757A1 (en) | Method for obtaining azaerythromycin | |
AU2001243297A1 (en) | Method for treating or preventing depression | |
AU2001259227A1 (en) | Method for authenticating artwork | |
EP1174298A3 (en) | Method for noise reducing between components | |
AU2002212224A1 (en) | Method for producing delta1-pyrrolines | |
AU2002352120A1 (en) | Coating method | |
AU2001235853A1 (en) | Methods for coating articles |