AU2001251169A1 - Synchronous flash memory with concurrent write and read operation - Google Patents
Synchronous flash memory with concurrent write and read operationInfo
- Publication number
- AU2001251169A1 AU2001251169A1 AU2001251169A AU5116901A AU2001251169A1 AU 2001251169 A1 AU2001251169 A1 AU 2001251169A1 AU 2001251169 A AU2001251169 A AU 2001251169A AU 5116901 A AU5116901 A AU 5116901A AU 2001251169 A1 AU2001251169 A1 AU 2001251169A1
- Authority
- AU
- Australia
- Prior art keywords
- flash memory
- read operation
- synchronous flash
- concurrent write
- concurrent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2281—Timing of a read operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/229—Timing of a write operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/22—Nonvolatile memory in which reading can be carried out from one memory bank or array whilst a word or sector in another bank or array is being erased or programmed simultaneously
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US19350600P | 2000-03-30 | 2000-03-30 | |
US60193506 | 2000-03-30 | ||
US09/628,184 US6851026B1 (en) | 2000-07-28 | 2000-07-28 | Synchronous flash memory with concurrent write and read operation |
US09628184 | 2000-07-28 | ||
PCT/US2001/010375 WO2001075892A2 (en) | 2000-03-30 | 2001-03-30 | Synchronous flash memory with concurrent write and read operation |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001251169A1 true AU2001251169A1 (en) | 2001-10-15 |
Family
ID=26889068
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001251169A Abandoned AU2001251169A1 (en) | 2000-03-30 | 2001-03-30 | Synchronous flash memory with concurrent write and read operation |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP3779209B2 (en) |
KR (1) | KR100438634B1 (en) |
AU (1) | AU2001251169A1 (en) |
DE (1) | DE10196002B3 (en) |
WO (1) | WO2001075892A2 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4472701B2 (en) | 2004-07-29 | 2010-06-02 | スパンション エルエルシー | Nonvolatile storage device information setting method, nonvolatile storage device, and system equipped with the same |
JPWO2007023544A1 (en) * | 2005-08-25 | 2009-03-26 | スパンション エルエルシー | Storage device, storage device control method, and storage control device control method |
JP2007164938A (en) | 2005-12-16 | 2007-06-28 | Matsushita Electric Ind Co Ltd | Semiconductor memory apparatus |
US7639540B2 (en) * | 2007-02-16 | 2009-12-29 | Mosaid Technologies Incorporated | Non-volatile semiconductor memory having multiple external power supplies |
KR101293226B1 (en) | 2011-06-30 | 2013-08-05 | (주)아토솔루션 | Nonvolatile memory device, electronic control system, and method of operating the nonvolatile memory device |
US11269779B2 (en) * | 2020-05-27 | 2022-03-08 | Microsoft Technology Licensing, Llc | Memory system with a predictable read latency from media with a long write latency |
DE102021107044A1 (en) | 2021-03-10 | 2022-09-15 | Elmos Semiconductor Se | Safety-relevant computer system with a data memory and a data memory |
CN113343319B (en) * | 2021-06-29 | 2024-04-02 | 珠海一微半导体股份有限公司 | FLASH type identification method and type identification system |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5245572A (en) * | 1991-07-30 | 1993-09-14 | Intel Corporation | Floating gate nonvolatile memory with reading while writing capability |
JP3435783B2 (en) * | 1994-03-17 | 2003-08-11 | 株式会社日立製作所 | Storage element including a plurality of sets of data buffers and data processing system using the storage element |
US5666322A (en) * | 1995-09-21 | 1997-09-09 | Nec Electronics, Inc. | Phase-locked loop timing controller in an integrated circuit memory |
JP3570879B2 (en) * | 1997-07-09 | 2004-09-29 | 富士通株式会社 | Nonvolatile semiconductor memory device |
JP3386705B2 (en) * | 1997-12-25 | 2003-03-17 | 株式会社東芝 | Semiconductor memory device and burst address counter thereof |
-
2001
- 2001-03-30 JP JP2001573484A patent/JP3779209B2/en not_active Expired - Fee Related
- 2001-03-30 AU AU2001251169A patent/AU2001251169A1/en not_active Abandoned
- 2001-03-30 DE DE10196002T patent/DE10196002B3/en not_active Expired - Fee Related
- 2001-03-30 KR KR10-2002-7013090A patent/KR100438634B1/en not_active IP Right Cessation
- 2001-03-30 WO PCT/US2001/010375 patent/WO2001075892A2/en active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
DE10196002T1 (en) | 2003-03-13 |
WO2001075892A2 (en) | 2001-10-11 |
KR20020086746A (en) | 2002-11-18 |
KR100438634B1 (en) | 2004-07-02 |
JP3779209B2 (en) | 2006-05-24 |
WO2001075892A3 (en) | 2002-05-23 |
JP2003529880A (en) | 2003-10-07 |
DE10196002B3 (en) | 2012-11-08 |
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