AU2001243463A1 - Memory interface and method of interfacing between functional entities - Google Patents

Memory interface and method of interfacing between functional entities

Info

Publication number
AU2001243463A1
AU2001243463A1 AU2001243463A AU4346301A AU2001243463A1 AU 2001243463 A1 AU2001243463 A1 AU 2001243463A1 AU 2001243463 A AU2001243463 A AU 2001243463A AU 4346301 A AU4346301 A AU 4346301A AU 2001243463 A1 AU2001243463 A1 AU 2001243463A1
Authority
AU
Australia
Prior art keywords
interfacing
memory interface
functional entities
entities
functional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2001243463A
Inventor
Latta David
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARC International Ltd
Original Assignee
ARC International PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARC International PLC filed Critical ARC International PLC
Publication of AU2001243463A1 publication Critical patent/AU2001243463A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
AU2001243463A 2000-03-10 2001-03-07 Memory interface and method of interfacing between functional entities Abandoned AU2001243463A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US18854600P 2000-03-10 2000-03-10
US60/188,546 2000-03-10
PCT/US2001/007197 WO2001069411A2 (en) 2000-03-10 2001-03-07 Memory interface and method of interfacing between functional entities

Publications (1)

Publication Number Publication Date
AU2001243463A1 true AU2001243463A1 (en) 2001-09-24

Family

ID=22693607

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2001243463A Abandoned AU2001243463A1 (en) 2000-03-10 2001-03-07 Memory interface and method of interfacing between functional entities

Country Status (3)

Country Link
US (5) US6988154B2 (en)
AU (1) AU2001243463A1 (en)
WO (1) WO2001069411A2 (en)

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US20140281114A1 (en) 2014-09-18
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US8959269B2 (en) 2015-02-17
US20030009612A1 (en) 2003-01-09
US20090055565A1 (en) 2009-02-26
US6988154B2 (en) 2006-01-17
US9418042B2 (en) 2016-08-16
WO2001069411A3 (en) 2003-04-17
US8688879B2 (en) 2014-04-01

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