AU2001240575A1 - Apparatus and method for generating a modulated clock signal including harmonicsthat exhibit a known sideband configuration - Google Patents
Apparatus and method for generating a modulated clock signal including harmonicsthat exhibit a known sideband configurationInfo
- Publication number
- AU2001240575A1 AU2001240575A1 AU2001240575A AU4057501A AU2001240575A1 AU 2001240575 A1 AU2001240575 A1 AU 2001240575A1 AU 2001240575 A AU2001240575 A AU 2001240575A AU 4057501 A AU4057501 A AU 4057501A AU 2001240575 A1 AU2001240575 A1 AU 2001240575A1
- Authority
- AU
- Australia
- Prior art keywords
- harmonicsthat
- exhibit
- generating
- clock signal
- signal including
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0614—Systems characterised by the synchronising information used the synchronising signal being characterised by the amplitude, duration or polarity
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B15/00—Suppression or limitation of noise or interference
- H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
- H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2215/00—Reducing interference at the transmission system level
- H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B2215/00—Reducing interference at the transmission system level
- H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
- H04B2215/067—Reduction of clock or synthesizer reference frequency harmonics by modulation dispersion
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09496739 | 2000-02-03 | ||
US09/496,739 US6711694B1 (en) | 2000-02-03 | 2000-02-03 | Apparatus and method for generating a modulated clock signal including harmonics that exhibit a known sideband configuration |
PCT/EP2001/001097 WO2001058068A1 (en) | 2000-02-03 | 2001-02-02 | Apparatus and method for generating a modulated clock signal including harmonics that exhibit a known sideband configuration |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2001240575A1 true AU2001240575A1 (en) | 2001-08-14 |
Family
ID=23973920
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2001240575A Abandoned AU2001240575A1 (en) | 2000-02-03 | 2001-02-02 | Apparatus and method for generating a modulated clock signal including harmonicsthat exhibit a known sideband configuration |
Country Status (4)
Country | Link |
---|---|
US (1) | US6711694B1 (en) |
EP (1) | EP1254531A1 (en) |
AU (1) | AU2001240575A1 (en) |
WO (1) | WO2001058068A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6988217B1 (en) * | 2002-02-27 | 2006-01-17 | Advanced Micro Devices, Inc. | Method and mechanism for generating a clock signal with a relatively linear increase or decrease in clock frequency |
KR20050057611A (en) * | 2002-10-02 | 2005-06-16 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | Method of protecting a frequency of a data stream from interference and circuit performing such a method |
US20090222509A1 (en) * | 2008-02-29 | 2009-09-03 | Chao King | System and Method for Sharing Storage Devices over a Network |
US8504854B2 (en) | 2010-06-21 | 2013-08-06 | Advanced Micro Devices, Inc. | Managing multiple operating points for stable virtual frequencies |
US9261949B2 (en) | 2010-10-29 | 2016-02-16 | Advanced Micro Devices, Inc. | Method for adaptive performance optimization of the soc |
GB201404226D0 (en) * | 2014-03-11 | 2014-04-23 | Rolls Royce Plc | Fault detection in induction machines |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5844817A (en) | 1981-09-11 | 1983-03-15 | Toshiba Corp | Pulse width modulating system |
FR2532138B1 (en) | 1982-08-20 | 1986-10-10 | Thomson Csf | METHOD FOR COMPRESSING THE RATE OF SUCCESSIVE DATA TRANSMITTED BETWEEN A TRANSMITTER AND A TELEVISION RECEIVER AND SYSTEM IMPLEMENTING THE METHOD |
JPS6124321A (en) | 1984-05-30 | 1986-02-03 | テクトロニツクス・インコ−ポレイテツド | Radiation reducing device of digital equipment |
JPH02241110A (en) | 1989-03-14 | 1990-09-25 | Anritsu Corp | Pulse eliminating circuit |
US5097158A (en) * | 1990-10-23 | 1992-03-17 | National Semiconductor Corporation | Digital noise feedthrough reducer and synchronizer for mixed-signal integrated circuit |
US5426392A (en) | 1993-08-27 | 1995-06-20 | Qualcomm Incorporated | Spread clock source for reducing electromagnetic interference generated by digital circuits |
US5442664A (en) * | 1993-12-20 | 1995-08-15 | Hewlett-Packard Company | Digitally phase modulated clock inhibiting reduced RF emissions |
US5659339A (en) | 1994-09-30 | 1997-08-19 | Sun Microsystems, Inc. | Method and apparatus for reducing electromagnetic interference radiated by flat panel display systems |
US5732106A (en) * | 1995-06-05 | 1998-03-24 | Itt Corporation | Pulse-shaping filter for modulator monolithic integration |
US5731728A (en) | 1995-11-13 | 1998-03-24 | National Semiconductor Corporation | Digital modulated clock circuit for reducing EMI spectral density |
US5889819A (en) | 1996-08-08 | 1999-03-30 | Hewlett-Packard Company | EMI reduction using double sideband suppressed carrier modulation |
JPH10232760A (en) * | 1997-02-20 | 1998-09-02 | Ricoh Co Ltd | Linear feedback shift register counter |
DE19718617A1 (en) | 1997-05-02 | 1998-11-05 | Philips Patentverwaltung | Delay arrangement |
US6160861A (en) * | 1999-10-22 | 2000-12-12 | Motorola, Inc. | Method and apparatus for a frequency modulation phase locked loop |
-
2000
- 2000-02-03 US US09/496,739 patent/US6711694B1/en not_active Expired - Lifetime
-
2001
- 2001-02-02 EP EP01911575A patent/EP1254531A1/en not_active Withdrawn
- 2001-02-02 WO PCT/EP2001/001097 patent/WO2001058068A1/en not_active Application Discontinuation
- 2001-02-02 AU AU2001240575A patent/AU2001240575A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
US6711694B1 (en) | 2004-03-23 |
WO2001058068A1 (en) | 2001-08-09 |
EP1254531A1 (en) | 2002-11-06 |
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