AU1581100A - Method and apparatus for managing the configuration and functionality of a semiconductor design - Google Patents

Method and apparatus for managing the configuration and functionality of a semiconductor design

Info

Publication number
AU1581100A
AU1581100A AU15811/00A AU1581100A AU1581100A AU 1581100 A AU1581100 A AU 1581100A AU 15811/00 A AU15811/00 A AU 15811/00A AU 1581100 A AU1581100 A AU 1581100A AU 1581100 A AU1581100 A AU 1581100A
Authority
AU
Australia
Prior art keywords
managing
functionality
configuration
semiconductor design
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU15811/00A
Inventor
James Hakewill
Mohammed Khan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARC Cores Ltd
Original Assignee
ARC Cores Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ARC Cores Ltd filed Critical ARC Cores Ltd
Publication of AU1581100A publication Critical patent/AU1581100A/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
AU15811/00A 1998-10-14 1999-10-14 Method and apparatus for managing the configuration and functionality of a semiconductor design Abandoned AU1581100A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10427198P 1998-10-14 1998-10-14
US60104271 1998-10-14
PCT/IB1999/002030 WO2000022553A2 (en) 1998-10-14 1999-10-14 Method and apparatus for managing the configuration and functionality of a semiconductor design

Publications (1)

Publication Number Publication Date
AU1581100A true AU1581100A (en) 2000-05-01

Family

ID=22299556

Family Applications (1)

Application Number Title Priority Date Filing Date
AU15811/00A Abandoned AU1581100A (en) 1998-10-14 1999-10-14 Method and apparatus for managing the configuration and functionality of a semiconductor design

Country Status (5)

Country Link
EP (1) EP1121656A2 (en)
KR (1) KR20010104622A (en)
AU (1) AU1581100A (en)
IL (1) IL142342A (en)
WO (1) WO2000022553A2 (en)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7325221B1 (en) * 2000-08-08 2008-01-29 Sonics, Incorporated Logic system with configurable interface
JP2002230065A (en) 2001-02-02 2002-08-16 Toshiba Corp System lsi developing device and method
AU2003223746A1 (en) 2002-04-25 2003-11-10 Arc International Apparatus and method for managing integrated circuit designs
US20050049843A1 (en) * 2003-08-29 2005-03-03 Lee Hewitt Computerized extension apparatus and methods
DE102004044963A1 (en) * 2004-09-16 2006-04-06 Tatung Co., Ltd. Agreement method for duplication use of hardware module on system-on-chip, involves calling related software function to output response data as execution result of hardware module, based on parameter requirement of hardware module
US8156457B2 (en) 2009-09-24 2012-04-10 Synopsys, Inc. Concurrent simulation of hardware designs with behavioral characteristics
KR101635610B1 (en) * 2015-05-15 2016-07-05 주식회사 휴윈 Apparatus and method for analysis of pcb em and circuits
US10678975B2 (en) * 2017-11-07 2020-06-09 Amazon Tecnnologies, Inc. Code module selection for device design

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE505783C2 (en) * 1995-10-03 1997-10-06 Ericsson Telefon Ab L M Method of manufacturing a digital signal processor
US5812416A (en) * 1996-07-18 1998-09-22 Lsi Logic Corporation Integrated circuit design decomposition

Also Published As

Publication number Publication date
IL142342A0 (en) 2002-03-10
KR20010104622A (en) 2001-11-26
EP1121656A2 (en) 2001-08-08
WO2000022553A2 (en) 2000-04-20
WO2000022553A3 (en) 2000-08-10
IL142342A (en) 2005-12-18

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AU1581100A (en) Method and apparatus for managing the configuration and functionality of a semiconductor design

Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase