ATE557424T1 - Verfahren zur verbesserung der zuverlässigkeit eines p-kanal-halbleiterbauelements und damit hergestelltes p-kanal-halbleiterbauelement - Google Patents

Verfahren zur verbesserung der zuverlässigkeit eines p-kanal-halbleiterbauelements und damit hergestelltes p-kanal-halbleiterbauelement

Info

Publication number
ATE557424T1
ATE557424T1 AT10186985T AT10186985T ATE557424T1 AT E557424 T1 ATE557424 T1 AT E557424T1 AT 10186985 T AT10186985 T AT 10186985T AT 10186985 T AT10186985 T AT 10186985T AT E557424 T1 ATE557424 T1 AT E557424T1
Authority
AT
Austria
Prior art keywords
layer
semiconductor component
channel semiconductor
channel
gate dielectric
Prior art date
Application number
AT10186985T
Other languages
English (en)
Inventor
Ben Kaczer
Jacopo Franco
Original Assignee
Imec
Univ Leuven Kath
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imec, Univ Leuven Kath filed Critical Imec
Application granted granted Critical
Publication of ATE557424T1 publication Critical patent/ATE557424T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1054—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a variation of the composition, e.g. channel with strained layer for increasing the mobility
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Junction Field-Effect Transistors (AREA)
AT10186985T 2009-10-09 2010-10-08 Verfahren zur verbesserung der zuverlässigkeit eines p-kanal-halbleiterbauelements und damit hergestelltes p-kanal-halbleiterbauelement ATE557424T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25040909P 2009-10-09 2009-10-09

Publications (1)

Publication Number Publication Date
ATE557424T1 true ATE557424T1 (de) 2012-05-15

Family

ID=43430712

Family Applications (1)

Application Number Title Priority Date Filing Date
AT10186985T ATE557424T1 (de) 2009-10-09 2010-10-08 Verfahren zur verbesserung der zuverlässigkeit eines p-kanal-halbleiterbauelements und damit hergestelltes p-kanal-halbleiterbauelement

Country Status (4)

Country Link
US (1) US8062962B2 (de)
EP (1) EP2309543B1 (de)
JP (1) JP2011082527A (de)
AT (1) ATE557424T1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102122464B1 (ko) 2013-11-29 2020-06-12 삼성전자 주식회사 셀프 리프레쉬 정보를 이용하여 부 바이어스 온도 불안정 현상을 방지하는 방법
US10680108B2 (en) * 2015-12-04 2020-06-09 Imec Vzw Field-effect transistor comprising germanium and manufacturing method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007287913A (ja) * 2006-04-17 2007-11-01 Matsushita Electric Ind Co Ltd 電界効果型トランジスタ及びその製造方法

Also Published As

Publication number Publication date
EP2309543A1 (de) 2011-04-13
EP2309543B1 (de) 2012-05-09
US20110084309A1 (en) 2011-04-14
JP2011082527A (ja) 2011-04-21
US8062962B2 (en) 2011-11-22

Similar Documents

Publication Publication Date Title
Meneghini et al. Buffer traps in Fe-doped AlGaN/GaN HEMTs: Investigation of the physical properties based on pulsed and transient measurements
CN101089642B (zh) 一种加速热载流子注入测试的方法
DE602006007808D1 (de) Vorrichtung, verfahren und verwendung zur behandlung von neuropathie mit stickoxid
SG124324A1 (en) Method of predicting high-k semiconductor device lifetime
WO2012040681A3 (en) Non-planar quantum well device having interfacial layer and method of forming same
Meneghini et al. Analysis of the reliability of AlGaN/GaN HEMTs submitted to on-state stress based on electroluminescence investigation
GB2473148A (en) Methods of forming buffer layer architecture on silicon and structures formed thereby
TW201614838A (en) Semiconductor device and methods for forming the same
GB2473364A (en) Method and apparatus for downhole spectroscopy
TW200721545A (en) Method of forming organic material layer
DE602008005817D1 (de) Verfahren zum Recycling eines Substrats, Herstellungsverfahren für einen beschichteten Wafer und dazu passendes recyceltes Donorsubstrat
TW200715363A (en) Management method and management device
BR112012019907A2 (pt) transistor, e, método para atuar um dispositivo semicondutor
Stocco et al. Proton induced trapping effect on space compatible GaN HEMTs
ATE557424T1 (de) Verfahren zur verbesserung der zuverlässigkeit eines p-kanal-halbleiterbauelements und damit hergestelltes p-kanal-halbleiterbauelement
Gupta et al. Part I: Physical insights into dynamic R ON behavior and a unique time-dependent critical stress voltage in AlGaN/GaN HEMTs
MY162202A (en) Methods of treating a semiconductor layer
Martin-Horcajo et al. Trapping phenomena in AlGaN and InAlN barrier HEMTs with different geometries
KR102087441B1 (ko) 웨이퍼 레벨 신뢰도 강화방법
Demirtas et al. Effect of trapping on the critical voltage for degradation in GaN high electron mobility transistors
Stojadinović et al. Negative bias temperature instability in thick gate oxides for power MOS transistors
Kang et al. Random telegraph noise in GaN-based light-emitting diodes
TW200504911A (en) Methods of controlling properties and characteristics of a gate insulation layer based upon electrical test data, and system for performing same
Mukherjee et al. Comprehensive study into underlying mechanisms of anomalous gate leakage degradation in GaN high electron mobility transistors
Wu Long term stability of enhancement mode GaN power devices