ATE536587T1 - Virtueller adressen-cache und verfahren zum gemeinsamen benutzen von daten unter verwendung einer eindeutigen task-kennung - Google Patents

Virtueller adressen-cache und verfahren zum gemeinsamen benutzen von daten unter verwendung einer eindeutigen task-kennung

Info

Publication number
ATE536587T1
ATE536587T1 AT04822269T AT04822269T ATE536587T1 AT E536587 T1 ATE536587 T1 AT E536587T1 AT 04822269 T AT04822269 T AT 04822269T AT 04822269 T AT04822269 T AT 04822269T AT E536587 T1 ATE536587 T1 AT E536587T1
Authority
AT
Austria
Prior art keywords
virtual address
data
stored
task identifier
memory
Prior art date
Application number
AT04822269T
Other languages
English (en)
Inventor
Itay Peled
Moshe Anschel
Moshe Bachar
Jacob Efrat
Alon Eldar
Yakov Tokar
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Application granted granted Critical
Publication of ATE536587T1 publication Critical patent/ATE536587T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
AT04822269T 2004-08-31 2004-08-31 Virtueller adressen-cache und verfahren zum gemeinsamen benutzen von daten unter verwendung einer eindeutigen task-kennung ATE536587T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP2004/011075 WO2006024323A1 (en) 2004-08-31 2004-08-31 A virtual address cache and method for sharing data using a unique task identifier

Publications (1)

Publication Number Publication Date
ATE536587T1 true ATE536587T1 (de) 2011-12-15

Family

ID=34959391

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04822269T ATE536587T1 (de) 2004-08-31 2004-08-31 Virtueller adressen-cache und verfahren zum gemeinsamen benutzen von daten unter verwendung einer eindeutigen task-kennung

Country Status (6)

Country Link
US (1) US7865691B2 (de)
EP (1) EP1789883B1 (de)
JP (1) JP2008511882A (de)
KR (1) KR101102260B1 (de)
AT (1) ATE536587T1 (de)
WO (1) WO2006024323A1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7644239B2 (en) 2004-05-03 2010-01-05 Microsoft Corporation Non-volatile memory cache performance improvement
US7490197B2 (en) 2004-10-21 2009-02-10 Microsoft Corporation Using external memory devices to improve system performance
US8914557B2 (en) 2005-12-16 2014-12-16 Microsoft Corporation Optimizing write and wear performance for a memory
US8631203B2 (en) * 2007-12-10 2014-01-14 Microsoft Corporation Management of external memory functioning as virtual cache
US9032151B2 (en) 2008-09-15 2015-05-12 Microsoft Technology Licensing, Llc Method and system for ensuring reliability of cache data and metadata subsequent to a reboot
US7953774B2 (en) 2008-09-19 2011-05-31 Microsoft Corporation Aggregation of write traffic to a data store
JP2010079765A (ja) * 2008-09-29 2010-04-08 Renesas Technology Corp 情報処理装置
WO2014016650A1 (en) * 2012-07-27 2014-01-30 Freescale Semiconductor, Inc. Circuitry for a computing system and computing system

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2210480B (en) 1987-10-02 1992-01-29 Sun Microsystems Inc Flush support
JPH03235143A (ja) * 1990-02-13 1991-10-21 Sanyo Electric Co Ltd キャッシュメモリ制御装置
EP0442474B1 (de) 1990-02-13 1997-07-23 Sanyo Electric Co., Ltd. Vorrichtung und Verfahren zum Steuern eines Cache-Speichers
US6671792B1 (en) * 2000-04-28 2003-12-30 Hewlett-Packard Development Company, L.P. Share masks and alias for directory coherency
EP1182568A3 (de) * 2000-08-21 2004-07-21 Texas Instruments Incorporated Auf Task-Kennzeichnung basierte TLB-Operation
EP1215583A1 (de) 2000-12-15 2002-06-19 Texas Instruments Incorporated Cache-Speicher dessen Tag-Einträge zusätzliche Qualifizierungsfelder enthalten
EP1215582A1 (de) * 2000-12-15 2002-06-19 Texas Instruments Incorporated Cache-Speicherzugriffs-Anordnung und Verfahren
ATE548695T1 (de) * 2000-08-21 2012-03-15 Texas Instruments France Softwaregesteuerte cache-speicherkonfiguration
US7085889B2 (en) * 2002-03-22 2006-08-01 Intel Corporation Use of a context identifier in a cache memory

Also Published As

Publication number Publication date
WO2006024323A1 (en) 2006-03-09
US7865691B2 (en) 2011-01-04
KR101102260B1 (ko) 2012-01-03
US20070294504A1 (en) 2007-12-20
EP1789883A1 (de) 2007-05-30
JP2008511882A (ja) 2008-04-17
EP1789883B1 (de) 2011-12-07
KR20070049677A (ko) 2007-05-11

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