ATE508405T1 - Skalierbare, komponentenanwählbare und hochvernetzte dreidimensionale komponentenanordnung innerhalb eines systems - Google Patents

Skalierbare, komponentenanwählbare und hochvernetzte dreidimensionale komponentenanordnung innerhalb eines systems

Info

Publication number
ATE508405T1
ATE508405T1 AT05792874T AT05792874T ATE508405T1 AT E508405 T1 ATE508405 T1 AT E508405T1 AT 05792874 T AT05792874 T AT 05792874T AT 05792874 T AT05792874 T AT 05792874T AT E508405 T1 ATE508405 T1 AT E508405T1
Authority
AT
Austria
Prior art keywords
component
local
dimensional
flat
block
Prior art date
Application number
AT05792874T
Other languages
English (en)
Inventor
Phillip Kuekes
R Williams
Raymond Beausoleil
Original Assignee
Hewlett Packard Development Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Development Co filed Critical Hewlett Packard Development Co
Application granted granted Critical
Publication of ATE508405T1 publication Critical patent/ATE508405T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16—Constructional details or arrangements
    • G06F1/18—Packaging or power distribution
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/10—Geometric CAD
    • G06F30/18—Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K7/00—Constructional details common to different types of electric apparatus
    • H05K7/14—Mounting supporting structure in casing or on frame or rack
    • H05K7/1438—Back panels or connecting means therefor; Terminals; Coding means to avoid wrong insertion
    • H05K7/1439—Back panel mother boards
    • H05K7/1444—Complex or three-dimensional-arrangements; Stepped or dual mother boards

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Geometry (AREA)
  • Mathematical Analysis (AREA)
  • Evolutionary Computation (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Human Computer Interaction (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Power Engineering (AREA)
  • Computational Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Multi Processors (AREA)
  • Toys (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Supply And Distribution Of Alternating Current (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
AT05792874T 2004-09-08 2005-08-30 Skalierbare, komponentenanwählbare und hochvernetzte dreidimensionale komponentenanordnung innerhalb eines systems ATE508405T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/935,845 US8214786B2 (en) 2004-09-08 2004-09-08 Scalable, component-accessible, and highly interconnected three-dimensional component arrangement within a system
PCT/US2005/030966 WO2006028845A1 (en) 2004-09-08 2005-08-30 Scalable, component-accessible, and highly interconnected three-dimensional component arrangement within a system

Publications (1)

Publication Number Publication Date
ATE508405T1 true ATE508405T1 (de) 2011-05-15

Family

ID=35429288

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05792874T ATE508405T1 (de) 2004-09-08 2005-08-30 Skalierbare, komponentenanwählbare und hochvernetzte dreidimensionale komponentenanordnung innerhalb eines systems

Country Status (8)

Country Link
US (1) US8214786B2 (de)
EP (1) EP1787184B1 (de)
JP (1) JP4695143B2 (de)
KR (1) KR100905870B1 (de)
CN (1) CN101040239B (de)
AT (1) ATE508405T1 (de)
DE (1) DE602005027854D1 (de)
WO (1) WO2006028845A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9220180B2 (en) * 2010-12-09 2015-12-22 Richard Anthony Dunn, JR. System and methods for scalable parallel data processing and process control
US20240314930A1 (en) * 2023-03-14 2024-09-19 Samsung Electronics Co., Ltd. Computing system with connecting boards

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3812402A (en) * 1972-12-18 1974-05-21 Texas Instruments Inc High density digital systems and their method of fabrication with liquid cooling for semi-conductor circuit chips
EP0506224A3 (en) * 1991-03-26 1994-05-11 Ibm Computer system package
EP0507021A1 (de) * 1991-04-04 1992-10-07 E.I. Du Pont De Nemours And Company System für elektrische Verbindung von Baugruppenträgern
DE4119038C2 (de) 1991-06-10 1997-06-12 Parsytec Computer Gmbh Parallelrechnersystem mit miteinander verschalteten Recheneinheiten
GB9117148D0 (en) 1991-08-08 1991-09-25 Skimming William G 3-dimensional modular processing engine
JPH0690072A (ja) 1992-07-24 1994-03-29 Toshiba Corp 基板実装方式および電子システム実装方式
US5729752A (en) * 1993-02-19 1998-03-17 Hewlett-Packard Company Network connection scheme
US5495397A (en) * 1993-04-27 1996-02-27 International Business Machines Corporation Three dimensional package and architecture for high performance computer
JPH07221420A (ja) 1994-01-31 1995-08-18 Ando Electric Co Ltd Ｉｃ搭載プリント板間の接続構造
JPH09172240A (ja) 1995-12-20 1997-06-30 Nippon Telegr & Teleph Corp <Ntt> 三次元実装構造
US6422876B1 (en) * 1999-12-08 2002-07-23 Nortel Networks Limited High throughput interconnection system using orthogonal connectors
US6469901B1 (en) * 2000-05-15 2002-10-22 3C Interactive, Inc. System and method for cartridge-based, geometry-variant scalable electronic systems
US6444576B1 (en) * 2000-06-16 2002-09-03 Chartered Semiconductor Manufacturing, Ltd. Three dimensional IC package module
EP1195808B1 (de) * 2000-10-04 2007-08-15 Infineon Technologies AG Verfahren zur Herstellung eines dünnen selbsttragenden Halbleitervorrichtungsfilms und einer dreidimensionalen Halbleitervorrichtung
US7402897B2 (en) * 2002-08-08 2008-07-22 Elm Technology Corporation Vertical system integration
US6814582B2 (en) * 2002-11-08 2004-11-09 Force Computers, Inc. Rear interconnect blade for rack mounted systems
US20040160742A1 (en) * 2003-02-14 2004-08-19 Weiss Roger E. Three-dimensional electrical device packaging employing low profile elastomeric interconnection
US7118830B1 (en) 2004-03-23 2006-10-10 Hammond Group, Inc. Battery paste additive and method for producing battery plates

Also Published As

Publication number Publication date
CN101040239A (zh) 2007-09-19
CN101040239B (zh) 2012-11-28
EP1787184A1 (de) 2007-05-23
WO2006028845A1 (en) 2006-03-16
EP1787184B1 (de) 2011-05-04
DE602005027854D1 (de) 2011-06-16
JP2008512773A (ja) 2008-04-24
KR100905870B1 (ko) 2009-07-03
US8214786B2 (en) 2012-07-03
JP4695143B2 (ja) 2011-06-08
KR20070050957A (ko) 2007-05-16
US20060053397A1 (en) 2006-03-09

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Legal Events

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