ATE473482T1 - Schnelles backup von datenverarbeitungsknoten in einem massiv parallelen computersystem - Google Patents

Schnelles backup von datenverarbeitungsknoten in einem massiv parallelen computersystem

Info

Publication number
ATE473482T1
ATE473482T1 AT07847538T AT07847538T ATE473482T1 AT E473482 T1 ATE473482 T1 AT E473482T1 AT 07847538 T AT07847538 T AT 07847538T AT 07847538 T AT07847538 T AT 07847538T AT E473482 T1 ATE473482 T1 AT E473482T1
Authority
AT
Austria
Prior art keywords
backup
nodes
computer system
fast
parallel computer
Prior art date
Application number
AT07847538T
Other languages
English (en)
Inventor
David Darrington
Patrick Joseph Mccarthy
Amanda Peters
Albert Sidelnik
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE473482T1 publication Critical patent/ATE473482T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/2025—Failover techniques using centralised failover control functionality
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/203—Failover techniques using migration
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2041—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with more than one idle spare processing component

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
AT07847538T 2006-12-11 2007-11-29 Schnelles backup von datenverarbeitungsknoten in einem massiv parallelen computersystem ATE473482T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/608,891 US7512836B2 (en) 2006-12-11 2006-12-11 Fast backup of compute nodes in failing midplane by copying to nodes in backup midplane via link chips operating in pass through and normal modes in massively parallel computing system
PCT/EP2007/063022 WO2008071555A1 (en) 2006-12-11 2007-11-29 Fast backup of compute nodes in a massively parallel computer system

Publications (1)

Publication Number Publication Date
ATE473482T1 true ATE473482T1 (de) 2010-07-15

Family

ID=39030857

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07847538T ATE473482T1 (de) 2006-12-11 2007-11-29 Schnelles backup von datenverarbeitungsknoten in einem massiv parallelen computersystem

Country Status (6)

Country Link
US (1) US7512836B2 (de)
EP (1) EP2118749B9 (de)
KR (1) KR101039185B1 (de)
AT (1) ATE473482T1 (de)
DE (1) DE602007007672D1 (de)
WO (1) WO2008071555A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080288630A1 (en) * 2007-05-18 2008-11-20 Motorola, Inc. Device management
US7783813B2 (en) * 2007-06-14 2010-08-24 International Business Machines Corporation Multi-node configuration of processor cards connected via processor fabrics
US20100017655A1 (en) * 2008-07-16 2010-01-21 International Business Machines Corporation Error Recovery During Execution Of An Application On A Parallel Computer
JP4789021B2 (ja) * 2009-02-06 2011-10-05 日本電気株式会社 データ処理装置及びデータ処理方法
US8140889B2 (en) * 2010-08-23 2012-03-20 International Business Machines Corporation Dynamically reassigning a connected node to a block of compute nodes for re-launching a failed job
JP5994601B2 (ja) * 2012-11-27 2016-09-21 富士通株式会社 並列計算機、並列計算機の制御プログラム及び並列計算機の制御方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3215177A1 (de) * 1982-04-23 1983-10-27 Hartmann & Braun Ag, 6000 Frankfurt Ueberwachungssystem fuer eine oder mehrere, gleichartig aufgebaute prozessstationen
US5533198A (en) * 1992-11-30 1996-07-02 Cray Research, Inc. Direction order priority routing of packets between nodes in a networked system
JP3980488B2 (ja) * 2001-02-24 2007-09-26 インターナショナル・ビジネス・マシーンズ・コーポレーション 超並列コンピュータ・システム
CN1319237C (zh) * 2001-02-24 2007-05-30 国际商业机器公司 超级计算机中通过动态重新划分的容错
US6832270B2 (en) * 2002-03-08 2004-12-14 Hewlett-Packard Development Company, L.P. Virtualization of computer system interconnects
JP2004079573A (ja) * 2002-08-09 2004-03-11 Murata Mfg Co Ltd コイル部品
US7711977B2 (en) 2004-04-15 2010-05-04 Raytheon Company System and method for detecting and managing HPC node failure

Also Published As

Publication number Publication date
US7512836B2 (en) 2009-03-31
WO2008071555A1 (en) 2008-06-19
US20080140735A1 (en) 2008-06-12
EP2118749A1 (de) 2009-11-18
KR101039185B1 (ko) 2011-06-03
EP2118749B9 (de) 2010-11-03
DE602007007672D1 (de) 2010-08-19
KR20090084888A (ko) 2009-08-05
EP2118749B1 (de) 2010-07-07

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