ATE468564T1 - Verbindungen in simd-prozessorarchitekturen - Google Patents

Verbindungen in simd-prozessorarchitekturen

Info

Publication number
ATE468564T1
ATE468564T1 AT05782948T AT05782948T ATE468564T1 AT E468564 T1 ATE468564 T1 AT E468564T1 AT 05782948 T AT05782948 T AT 05782948T AT 05782948 T AT05782948 T AT 05782948T AT E468564 T1 ATE468564 T1 AT E468564T1
Authority
AT
Austria
Prior art keywords
processing element
assigned
memory
access
connections
Prior art date
Application number
AT05782948T
Other languages
English (en)
Inventor
Anteneh Abbo
Leo Sevat
Richard P Kleihorst
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE468564T1 publication Critical patent/ATE468564T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8015One dimensional arrays, e.g. rings, linear arrays, buses
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Image Processing (AREA)
  • Multi Processors (AREA)
  • Advance Control (AREA)
  • Microcomputers (AREA)
AT05782948T 2004-09-09 2005-09-08 Verbindungen in simd-prozessorarchitekturen ATE468564T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0420004.4A GB0420004D0 (en) 2004-09-09 2004-09-09 Interconnections in SIMD processor architectures
PCT/IB2005/052929 WO2006027751A1 (en) 2004-09-09 2005-09-08 Interconnections in simd processor architectures

Publications (1)

Publication Number Publication Date
ATE468564T1 true ATE468564T1 (de) 2010-06-15

Family

ID=33186717

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05782948T ATE468564T1 (de) 2004-09-09 2005-09-08 Verbindungen in simd-prozessorarchitekturen

Country Status (9)

Country Link
US (1) US7596679B2 (de)
EP (1) EP1792258B1 (de)
JP (1) JP2008512762A (de)
KR (1) KR20070061538A (de)
CN (1) CN101014948A (de)
AT (1) ATE468564T1 (de)
DE (1) DE602005021374D1 (de)
GB (1) GB0420004D0 (de)
WO (1) WO2006027751A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009538464A (ja) 2006-05-24 2009-11-05 エヌエックスピー ビー ヴィ 画像データのブロック及びラインベースの処理を実行する集積回路装置
CN101467160B (zh) * 2006-06-08 2012-01-25 皇家飞利浦电子股份有限公司 Simd处理器上的模式检测
US7441099B2 (en) * 2006-10-03 2008-10-21 Hong Kong Applied Science and Technology Research Institute Company Limited Configurable SIMD processor instruction specifying index to LUT storing information for different operation and memory location for each processing unit
FR2918190B1 (fr) * 2007-06-26 2009-09-18 Thales Sa Dispositif d'adressage pour processeur parallele.
CN102112983A (zh) 2008-08-06 2011-06-29 Nxp股份有限公司 Simd并行处理器架构
JP5532132B2 (ja) 2009-11-26 2014-06-25 日本電気株式会社 Simdモードで動作するプロセッシング・エレメントの内部メモリに分散記憶された正方マトリックス及びその転置マトリックスに、時間と面積の効率良いアクセスを可能とする装置及び方法
US10061590B2 (en) 2015-01-07 2018-08-28 Micron Technology, Inc. Generating and executing a control flow
US10956360B2 (en) * 2017-03-14 2021-03-23 Azurengine Technologies Zhuhai Inc. Static shared memory access with one piece of input data to be reused for successive execution of one instruction in a reconfigurable parallel processor
KR102586173B1 (ko) * 2017-10-31 2023-10-10 삼성전자주식회사 프로세서 및 그 제어 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4827403A (en) * 1986-11-24 1989-05-02 Thinking Machines Corporation Virtual processor techniques in a SIMD multiprocessor array
JPH05120321A (ja) * 1991-10-30 1993-05-18 Sony Corp 行列計算の演算方法
JPH0713956A (ja) * 1993-06-28 1995-01-17 Toshiba Corp Simd型並列計算機データ転送装置
US5638533A (en) * 1995-10-12 1997-06-10 Lsi Logic Corporation Method and apparatus for providing data to a parallel processing array
US5960211A (en) * 1995-12-15 1999-09-28 Hughes Aircraft Data formatting method and apparatus for a data processing array
US6018814A (en) * 1997-03-26 2000-01-25 Simd Solutions, Inc. Star-I: scalable tester architecture with I-cached SIMD technology
JPH11353289A (ja) * 1998-06-10 1999-12-24 Mitsubishi Electric Corp 並列処理プロセッサ及び並列処理方法
US7185174B2 (en) * 2001-03-02 2007-02-27 Mtekvision Co., Ltd. Switch complex selectively coupling input and output of a node in two-dimensional array to four ports and using four switches coupling among ports
KR100401946B1 (ko) * 2001-08-10 2003-10-17 박종원 주소계산과 자료이동방법 및 이를 이용한 충돌회피 기억 장치

Also Published As

Publication number Publication date
US7596679B2 (en) 2009-09-29
KR20070061538A (ko) 2007-06-13
CN101014948A (zh) 2007-08-08
JP2008512762A (ja) 2008-04-24
EP1792258A1 (de) 2007-06-06
EP1792258B1 (de) 2010-05-19
DE602005021374D1 (de) 2010-07-01
US20080320273A1 (en) 2008-12-25
GB0420004D0 (en) 2004-10-13
WO2006027751A1 (en) 2006-03-16

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